公开(公告)号：USRE40965E1

公开(公告)日：2009-11-10

申请号：US11065718

申请日：2005-02-24

申请人： Shuichi Kaneko ,  Hironori Aoki ,  Akio Iwabuchi

发明人： Shuichi Kaneko ,  Hironori Aoki ,  Akio Iwabuchi

IPC分类号： H01L21/4763

CPC分类号： H01L21/76804

摘要： There is formed on a semiconductor substrate a lamination of a first insulating film of nondoped silicon glass or the like and, on this first insulating film, a second insulating film of boron phosphor silicate glass or the like, with a conductor layer between the two insulating films. A hole is first dry-etched in the second insulating film, leaving the substrate surface covered by the first insulating film. Then the second insulating film is heated to a reflow temperature such that the hole is thermally deformed, flaring as it extends away from the insulating film. Then a second hole is dry-etched in the first insulating film through the first recited hole in the second insulating film, with the consequent exposure of the semiconductor surface. Then a contract electrode is fabricated by filling the first and the second hole with an electroconductive material into direct contact with the substrate surface. Being covered by the first insulating film, the substrate surface is not to be contaminated with impurities during the heating of the second insulating film.

公开(公告)号：US09093432B2

公开(公告)日：2015-07-28

申请号：US13243596

申请日：2011-09-23

申请人： Akio Iwabuchi ,  Hironori Aoki

发明人： Akio Iwabuchi ,  Hironori Aoki

IPC分类号： H01L23/482 ,  H01L29/40 ,  H01L23/00

CPC分类号： H01L23/4824 ,  H01L24/05 ,  H01L29/404 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2924/00014

摘要： A semiconductor device is free from degradation of characteristics attributable to a manufacturing process thereof and its characteristics are hardly affected by changes in electric potentials of bonding pads. The semiconductor device 10 includes an active region 12, a first insulating layer 13 covering the active region 12, a floating conductor 14 formed on the first insulating layer 13, a second insulating layer 15 formed on the first insulating layer 13 and the floating conductor 14, a bonding pad 18 formed on the second insulating layer 17 and interconnection vias 19, 20 for electrically connecting the active region 12 and the bonding pad 18.

摘要翻译： 半导体器件不会因其制造工艺而导致的特性劣化，并且其特性几乎不受键合焊盘的电位变化的影响。 半导体器件10包括有源区12，覆盖有源区12的第一绝缘层13，形成在第一绝缘层13上的浮置导体14，形成在第一绝缘层13上的第二绝缘层15和浮动导体14 ，形成在第二绝缘层17上的接合焊盘18和用于电连接有源区域12和接合焊盘18的互连通孔19,20。

公开(公告)号：US20120043588A1

公开(公告)日：2012-02-23

申请号：US13210950

申请日：2011-08-16

申请人： Akio IWABUCHI ,  Hironori Aoki

发明人： Akio IWABUCHI ,  Hironori Aoki

IPC分类号： H01L29/778

CPC分类号： H01L29/7787 ,  H01L29/1029 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

摘要： A semiconductor device includes: a first semiconductor layer; a second semiconductor layer; a two-dimensional carrier gas layer; a source electrode; a drain electrode; a gate electrode; and an auxiliary electrode located above the two-dimensional carrier gas layer between the gate electrode and the drain electrode. Channel resistance of the two-dimensional carrier gas layer between the gate electrode and the auxiliary electrode is set higher than channel resistance of the two-dimensional carrier gas layer between the gate electrode and the source electrode.

摘要翻译： 一种半导体器件包括：第一半导体层; 第二半导体层; 二维载气层; 源电极; 漏电极; 栅电极; 以及位于栅电极和漏电极之间的二维载气层上方的辅助电极。 栅电极和辅助电极之间的二维载气层的沟道电阻被设定为高于栅电极和源电极之间的二维载气层的沟道电阻。

公开(公告)号：US09293570B2

公开(公告)日：2016-03-22

申请号：US13223986

申请日：2011-09-01

申请人： Akio Iwabuchi ,  Hironori Aoki

发明人： Akio Iwabuchi ,  Hironori Aoki

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L27/06 ,  H03K17/082 ,  H01L29/20

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/2003 ,  H01L2924/0002 ,  H03K17/0822 ,  H01L2924/00

摘要： The operation of a HEMT is monitored on an on-chip basis without increasing the power consumption rate. In a semiconductor device 10, an electron supply layer 12 is formed on a channel layer 11. A two-dimensional electron gas (2DEG) layer 13 is formed at the side of the channel layer of the hetero-junction interface. Electrons flow through the 2DEG layer 13 between a source electrode 14 formed on the surface of the electron supply layer 12 and a drain electrode 15 that is formed on the same surface. A potential detection electrode 17 is arranged on the electron supply layer 12 between the gate electrode 16 and the source electrode 14. A resistor 18 having a sufficiently high resistance value makes the electric current flowing to the potential detection electrode 17 negligible relative to the drain current in operation.

摘要翻译： HEMT的操作在片上进行监控，而不增加功耗率。 在半导体装置10中，电子供给层12形成在沟道层11上。在异质结界面的沟道层侧形成二维电子气（2DEG）层13。 电子在形成在电子供给层12的表面上的源电极14和形成在同一表面上的漏电极15之间流过2DEG层13。 在栅电极16和源电极14之间的电子供给层12上配置有电位检测电极17.具有足够高的电阻值的电阻18使得流到电位检测电极17的电流相对于漏极电流可忽略不计 在运行。

公开(公告)号：US08823061B2

公开(公告)日：2014-09-02

申请号：US13210950

申请日：2011-08-16

申请人： Akio Iwabuchi ,  Hironori Aoki

发明人： Akio Iwabuchi ,  Hironori Aoki

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/423 ,  H01L29/10 ,  H01L29/20

CPC分类号： H01L29/7787 ,  H01L29/1029 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462

摘要： A semiconductor device includes: a first semiconductor layer; a second semiconductor layer; a two-dimensional carrier gas layer; a source electrode; a drain electrode; a gate electrode; and an auxiliary electrode located above the two-dimensional carrier gas layer between the gate electrode and the drain electrode. Channel resistance of the two-dimensional carrier gas layer between the gate electrode and the auxiliary electrode is set higher than channel resistance of the two-dimensional carrier gas layer between the gate electrode and the source electrode.

摘要翻译： 一种半导体器件包括：第一半导体层; 第二半导体层; 二维载气层; 源电极; 漏电极; 栅电极; 以及位于栅电极和漏电极之间的二维载气层上方的辅助电极。 栅电极和辅助电极之间的二维载气层的沟道电阻被设定为高于栅电极和源电极之间的二维载气层的沟道电阻。

公开(公告)号：US08519442B2

公开(公告)日：2013-08-27

申请号：US13251563

申请日：2011-10-03

申请人： Akio Iwabuchi ,  Hironori Aoki

发明人： Akio Iwabuchi ,  Hironori Aoki

IPC分类号： H01L29/66

CPC分类号： H01L29/7787 ,  H01L29/0692 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316

摘要： A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a two-dimensional carrier gas layer, a first main electrode, a second main electrode, a first gate electrode, and a second gate electrode. The first gate electrode is provided between a part of the first main electrode and a part of the second main electrode opposite to the part of the first main electrode. The second gate electrode is provided between another part of the first main electrode and another part of the second main electrode opposite to the another part of the first main electrode with a separation region interposed between the first gate electrode and the second gate electrode. The second gate electrode is controlled independently of the first gate electrode.

摘要翻译： 半导体器件包括第一半导体层，第二半导体层，二维载气层，第一主电极，第二主电极，第一栅电极和第二栅电极。 第一栅电极设置在第一主电极的一部分和与第一主电极的一部分相对的第二主电极的一部分之间。 第二栅电极设置在第一主电极的另一部分和第二主电极的与第一主电极的另一部分相对的另一部分之间，并且分隔区置于第一栅电极和第二栅电极之间。 第二栅极电极独立于第一栅电极被控制。

公开(公告)号：US20120080724A1

公开(公告)日：2012-04-05

申请号：US13251563

申请日：2011-10-03

申请人： Akio Iwabuchi ,  Hironori Aoki

发明人： Akio Iwabuchi ,  Hironori Aoki

IPC分类号： H01L29/778

CPC分类号： H01L29/7787 ,  H01L29/0692 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316

摘要： A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a two-dimensional carrier gas layer, a first main electrode, a second main electrode, a first gate electrode, and a second gate electrode. The first gate electrode is provided between a part of the first main electrode and a part of the second main electrode opposite to the part of the first main electrode. The second gate electrode is provided between another part of the first main electrode and another part of the second main electrode opposite to the another part of the first main electrode with a separation region interposed between the first gate electrode and the second gate electrode. The second gate electrode is controlled independently of the first gate electrode.

摘要翻译： 半导体器件包括第一半导体层，第二半导体层，二维载气层，第一主电极，第二主电极，第一栅电极和第二栅电极。 第一栅电极设置在第一主电极的一部分和与第一主电极的一部分相对的第二主电极的一部分之间。 第二栅电极设置在第一主电极的另一部分和第二主电极的与第一主电极的另一部分相对的另一部分之间，并且分隔区置于第一栅电极和第二栅电极之间。 第二栅极电极独立于第一栅电极被控制。

公开(公告)号：US20120056648A1

公开(公告)日：2012-03-08

申请号：US13223986

申请日：2011-09-01

申请人： Akio IWABUCHI ,  Hironori Aoki

发明人： Akio IWABUCHI ,  Hironori Aoki

IPC分类号： H03K17/06 ,  H01L23/544

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/2003 ,  H01L2924/0002 ,  H03K17/0822 ,  H01L2924/00

摘要： The operation of a HEMT is monitored on an on-chip basis without increasing the power consumption rate. In a semiconductor device 10, an electron supply layer 12 is formed on a channel layer 11. A two-dimensional electron gas (2DEG) layer 13 is formed at the side of the channel layer of the hetero-junction interface. Electrons flow through the 2DEG layer 13 between a source electrode 14 formed on the surface of the electron supply layer 12 and a drain electrode 15 that is formed on the same surface. A potential detection electrode 17 is arranged on the electron supply layer 12 between the gate electrode 16 and the source electrode 14. A resistor 18 having a sufficiently high resistance value makes the electric current flowing to the potential detection electrode 17 negligible relative to the drain current in operation.

摘要翻译： HEMT的操作在片上进行监控，而不增加功耗率。 在半导体装置10中，电子供给层12形成在沟道层11上。在异质结界面的沟道层侧形成二维电子气（2DEG）层13。 电子在形成在电子供给层12的表面上的源电极14和形成在同一表面上的漏电极15之间流过2DEG层13。 在栅电极16和源电极14之间的电子供给层12上配置有电位检测电极17.具有足够高的电阻值的电阻18使得流到电位检测电极17的电流相对于漏极电流可忽略不计 在运行。

公开(公告)号：US06524949B2

公开(公告)日：2003-02-25

申请号：US10003192

申请日：2001-10-29

申请人： Shuichi Kaneko ,  Hironori Aoki ,  Akio Iwabuchi

发明人： Shuichi Kaneko ,  Hironori Aoki ,  Akio Iwabuchi

IPC分类号： H01L214763

CPC分类号： H01L21/76804

摘要： There is formed on a semiconductor substrate a lamination of a first insulating film of nondoped silicon glass or the like and, on this first insulating film, a second insulating film of boron phosphor silicate glass or the like, with a conductor layer between the two insulating films. A hole is first dry-etched in the second insulating film, leaving the substrate surface covered by the first insulating film. Then the second insulating film is heated to a reflow temperature such that the hole is thermally deformed, flaring as it extends away from the insulating film. Then a second hole is dry-etched in the first insulating film through the first recited hole in the second insulating film, with the consequent exposure of the semiconductor surface. Then a contract electrode is fabricated by filling the first and the second hole with an electroconductive material into direct contact with the substrate surface. Being covered by the first insulating film, the substrate surface is not to be contaminated with impurities during the heating of the second insulating film.

公开(公告)号：US08954384B2

公开(公告)日：2015-02-10

申请号：US13560385

申请日：2012-07-27

申请人： Hironori Aoki ,  Hirokazu Ogasawara ,  Yoshihiro Kataoka

发明人： Hironori Aoki ,  Hirokazu Ogasawara ,  Yoshihiro Kataoka

IPC分类号： G06F7/00 ,  G06F17/00

CPC分类号： G06F17/30194

摘要： The file storage system of the present invention comprises a first server including a first file system (FS), and a second server including a second FS. The first and second servers respectively store first and second difference management tables. Upon receiving a write request, the first server stores a difference of a first file in the first FS, updates the first difference management table, and sends, to the second server, a difference storage notification showing that the difference of the first file has been stored in the first FS. The second server receives the difference storage notification, and updates the second difference management table.

摘要翻译： 本发明的文件存储系统包括包括第一文件系统（FS）的第一服务器和包括第二FS的第二服务器。 第一和第二服务器分别存储第一和第二差异管理表。 在接收到写请求时，第一服务器存储第一文件中的第一文件的差异，更新第一差分管理表，并向第二服务器发送表示第一文件的差异的差存储通知 存储在第一个FS。 第二服务器接收差异存储通知，并更新第二差异管理表。