利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

49 条记录 (耗时 0.023 秒)

    SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE
    1.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE 有权
    半导体器件，包括不对称的轻型漏极（LDD）区域，相关方法和设计结构

    公开(公告)号：US20120146158A1

    公开(公告)日：2012-06-14

    申请号：US12963054

    申请日：2010-12-08

    申请人： Alan B. Botula ,  Robert M. Rassel ,  Yun Shi ,  Mark Edward Stidham

    发明人： Alan B. Botula ,  Robert M. Rassel ,  Yun Shi ,  Mark Edward Stidham

    IPC分类号： H01L29/78 ,  G06F17/50 ,  H01L21/336

    CPC分类号： H01L29/7833 ,  H01L21/26586 ,  H01L29/66659 ,  H01L29/7835

    摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate including a first source drain region, a second source drain region, and an intrinsic region therebetween; an asymmetric lightly doped drain (LDD) region within the substrate, wherein the asymmetric LDD region extends from the first source drain region into the intrinsic region between the first source drain region and the second source drain region; and a gate positioned atop the semiconductor substrate, wherein an outer edge of the gate overlaps the second source drain region. A related method and design structure are also disclosed.

    摘要翻译： 公开了一种半导体器件。 半导体器件包括：半导体衬底，包括第一源极漏极区域，第二源极漏极区域及其之间的固有区域; 在所述衬底内的不对称轻掺杂漏极（LDD）区域，其中所述不对称LDD区域从所述第一源极漏极区域延伸到所述第一源极漏极区域和所述第二源极漏极区域之间的本征区域; 以及位于所述半导体衬底顶部的栅极，其中所述栅极的外边缘与所述第二源极漏极区重叠。 还公开了相关的方法和设计结构。

    Self-aligned Schottky diode
    2.
    发明授权
    Self-aligned Schottky diode 有权
    自对准肖特基二极管

    公开(公告)号：US08299558B2

    公开(公告)日：2012-10-30

    申请号：US13197414

    申请日：2011-08-03

    申请人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    发明人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    IPC分类号： H01L29/66

    CPC分类号： H01L29/7839 ,  H01L21/26586 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/66659

    摘要： A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of a first conductivity type, which is the opposite of the second conductivity type, on one side of a dummy gate electrode and a Schottky barrier structure surrounded by the doped guard ring on the other side. A Schottky barrier region may be laterally surrounded by the dummy gate electrode and the doped guard ring. The doped guard ring includes an unmetallized portion of a gate-side second-conductivity-type-doped semiconductor region having a doping of a second conductivity type. A Schottky barrier region may be laterally surrounded by a doped guard ring including a gate-side doped semiconductor region and a STI-side doped semiconductor region. Design structures for the inventive Schottky barrier diode are also provided.

    摘要翻译： 肖特基势垒二极管包括在绝缘体上半导体（SOI）衬底中具有第二导电类型掺杂的掺杂保护环。 肖特基势垒二极管还包括在虚拟栅极电极的一侧上具有与第二导电类型相反的第一导电类型的掺杂的第一导电型掺杂半导体区域，以及被包围的肖特基势垒结构 另一侧的掺杂保护环。 肖特基势垒区域可以被伪栅电极和掺杂保护环横向包围。 掺杂保护环包括具有第二导电类型的掺杂的栅极侧第二导电型掺杂半导体区域的未金属化部分。 肖特基势垒区域可以由包括栅极掺杂半导体区域和STI侧掺杂半导体区域的掺杂保护环横向包围。 还提供了用于本发明的肖特基势垒二极管的设计结构。

    Self-aligned Schottky diode
    3.
    发明授权
    Self-aligned Schottky diode 有权
    自对准肖特基二极管

    公开(公告)号：US08008142B2

    公开(公告)日：2011-08-30

    申请号：US12538213

    申请日：2009-08-10

    申请人： Alan B. Botula ,  Alvin J. Joseph ,  Alan D. Norris ,  Robert M. Rassel ,  Yun Shi

    发明人： Alan B. Botula ,  Alvin J. Joseph ,  Alan D. Norris ,  Robert M. Rassel ,  Yun Shi

    IPC分类号： H01L21/338

    CPC分类号： H01L29/7839 ,  H01L21/26586 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/66659

    摘要： A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of a first conductivity type, which is the opposite of the second conductivity type, on one side of a dummy gate electrode and a Schottky barrier structure surrounded by the doped guard ring on the other side. A Schottky barrier region may be laterally surrounded by the dummy gate electrode and the doped guard ring. The doped guard ring includes an unmetallized portion of a gate-side second-conductivity-type-doped semiconductor region having a doping of a second conductivity type. A Schottky barrier region may be laterally surrounded by a doped guard ring including a gate-side doped semiconductor region and a STI-side doped semiconductor region. Design structures for the inventive Schottky barrier diode are also provided.

    摘要翻译： 肖特基势垒二极管包括在绝缘体上半导体（SOI）衬底中具有第二导电类型掺杂的掺杂保护环。 肖特基势垒二极管还包括在虚拟栅极电极的一侧上具有与第二导电类型相反的第一导电类型的掺杂的第一导电型掺杂半导体区域，以及被包围的肖特基势垒结构 另一侧的掺杂保护环。 肖特基势垒区域可以被伪栅电极和掺杂保护环横向包围。 掺杂保护环包括具有第二导电类型的掺杂的栅极侧第二导电型掺杂半导体区域的未金属化部分。 肖特基势垒区域可以由包括栅极掺杂半导体区域和STI侧掺杂半导体区域的掺杂保护环横向包围。 还提供了用于本发明的肖特基势垒二极管的设计结构。

    Semiconductor device including asymmetric lightly doped drain (LDD) region, related method and design structure
    4.
    发明授权
    Semiconductor device including asymmetric lightly doped drain (LDD) region, related method and design structure 有权
    半导体器件包括非对称轻掺杂漏极（LDD）区域，相关方法和设计结构

    公开(公告)号：US08518782B2

    公开(公告)日：2013-08-27

    申请号：US12963054

    申请日：2010-12-08

    申请人： Alan B. Botula ,  Robert M. Rassel ,  Yun Shi ,  Mark E. Stidham

    发明人： Alan B. Botula ,  Robert M. Rassel ,  Yun Shi ,  Mark E. Stidham

    IPC分类号： H01L21/426

    CPC分类号： H01L29/7833 ,  H01L21/26586 ,  H01L29/66659 ,  H01L29/7835

    摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate including a first source drain region, a second source drain region, and an intrinsic region therebetween; an asymmetric lightly doped drain (LDD) region within the substrate, wherein the asymmetric LDD region extends from the first source drain region into the intrinsic region between the first source drain region and the second source drain region; and a gate positioned atop the semiconductor substrate, wherein an outer edge of the gate overlaps the second source drain region. A related method and design structure are also disclosed.

    摘要翻译： 公开了一种半导体器件。 半导体器件包括：半导体衬底，包括第一源极漏极区域，第二源极漏极区域及其之间的固有区域; 在所述衬底内的不对称轻掺杂漏极（LDD）区域，其中所述不对称LDD区域从所述第一源极漏极区域延伸到所述第一源极漏极区域和所述第二源极漏极区域之间的本征区域; 以及位于所述半导体衬底顶部的栅极，其中所述栅极的外边缘与所述第二源极漏极区重叠。 还公开了相关的方法和设计结构。

    SELF-ALIGNED SCHOTTKY DIODE
    5.
    发明申请
    SELF-ALIGNED SCHOTTKY DIODE 有权
    自对准肖特基二极管

    公开(公告)号：US20110284961A1

    公开(公告)日：2011-11-24

    申请号：US13197414

    申请日：2011-08-03

    申请人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    发明人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    IPC分类号： H01L29/786 ,  G06F17/50 ,  G06F11/22

    CPC分类号： H01L29/7839 ,  H01L21/26586 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/66659

    摘要： A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of a first conductivity type, which is the opposite of the second conductivity type, on one side of a dummy gate electrode and a Schottky barrier structure surrounded by the doped guard ring on the other side. A Schottky barrier region may be laterally surrounded by the dummy gate electrode and the doped guard ring. The doped guard ring includes an unmetallized portion of a gate-side second-conductivity-type-doped semiconductor region having a doping of a second conductivity type. A Schottky barrier region may be laterally surrounded by a doped guard ring including a gate-side doped semiconductor region and a STI-side doped semiconductor region. Design structures for the inventive Schottky barrier diode are also provided.

    摘要翻译： 肖特基势垒二极管包括在绝缘体上半导体（SOI）衬底中具有第二导电类型掺杂的掺杂保护环。 肖特基势垒二极管还包括在虚拟栅极电极的一侧上具有与第二导电类型相反的第一导电类型的掺杂的第一导电型掺杂半导体区域，以及被包围的肖特基势垒结构 另一侧的掺杂保护环。 肖特基势垒区域可以被伪栅电极和掺杂保护环横向包围。 掺杂保护环包括具有第二导电类型的掺杂的栅极侧第二导电型掺杂半导体区域的未金属化部分。 肖特基势垒区域可以由包括栅极掺杂半导体区域和STI侧掺杂半导体区域的掺杂保护环横向包围。 还提供了用于本发明的肖特基势垒二极管的设计结构。

    SELF-ALIGNED SCHOTTKY DIODE
    6.
    发明申请
    SELF-ALIGNED SCHOTTKY DIODE 有权
    自对准肖特基二极管

    公开(公告)号：US20100230751A1

    公开(公告)日：2010-09-16

    申请号：US12538213

    申请日：2009-08-10

    申请人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    发明人： Alan B. Botula ,  Alvin J. Joseph ,  Alan F. Norris ,  Robert M. Rassel ,  Yun Shi

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7839 ,  H01L21/26586 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/66659

    摘要： A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of a first conductivity type, which is the opposite of the second conductivity type, on one side of a dummy gate electrode and a Schottky barrier structure surrounded by the doped guard ring on the other side. A Schottky barrier region may be laterally surrounded by the dummy gate electrode and the doped guard ring. The doped guard ring includes an unmetallized portion of a gate-side second-conductivity-type-doped semiconductor region having a doping of a second conductivity type. A Schottky barrier region may be laterally surrounded by a doped guard ring including a gate-side doped semiconductor region and a STI-side doped semiconductor region. Design structures for the inventive Schottky barrier diode are also provided.

    摘要翻译： 肖特基势垒二极管包括在绝缘体上半导体（SOI）衬底中具有第二导电类型掺杂的掺杂保护环。 肖特基势垒二极管还包括在虚拟栅极电极的一侧上具有与第二导电类型相反的第一导电类型的掺杂的第一导电型掺杂半导体区域，以及被包围的肖特基势垒结构 另一侧的掺杂保护环。 肖特基势垒区域可以被伪栅电极和掺杂保护环横向包围。 掺杂保护环包括具有第二导电类型的掺杂的栅极侧第二导电型掺杂半导体区域的未金属化部分。 肖特基势垒区域可以由包括栅极掺杂半导体区域和STI侧掺杂半导体区域的掺杂保护环横向包围。 还提供了用于本发明的肖特基势垒二极管的设计结构。

    Field effect transistor and method of manufacture
    9.
    发明授权
    Field effect transistor and method of manufacture 有权
    场效应晶体管及其制造方法

    公开(公告)号：US08921190B2

    公开(公告)日：2014-12-30

    申请号：US12099175

    申请日：2008-04-08

    申请人： Alan B. Botula ,  Alvin J. Joseph ,  Stephen E. Luce ,  John J. Pekarik ,  Yun Shi

    发明人： Alan B. Botula ,  Alvin J. Joseph ,  Stephen E. Luce ,  John J. Pekarik ,  Yun Shi

    IPC分类号： H01L21/336 ,  H01L29/417 ,  H01L29/66

    CPC分类号： H01L29/7834 ,  H01L29/0847 ,  H01L29/41783 ,  H01L29/423 ,  H01L29/66575

    摘要： A semiconductor structure and method of manufacture and, more particularly, a field effect transistor that has a body contact and method of manufacturing the same is provided. The structure includes a device having a raised source region of a first conductivity type and an active region below the raised source region extending to a body of the device. The active region has a second conductivity type different than the first conductivity type. A contact region is in electric contact with the active region. The method includes forming a raised source region over an active region of a device and forming a contact region of a same conductivity type as the active region, wherein the active region forms a contact body between the contact region and a body of the device.

    摘要翻译： 提供一种半导体结构和制造方法，更具体地说，具有身体接触的场效应晶体管及其制造方法。 该结构包括具有第一导电类型的凸起源极区域和延伸到器件主体的凸起源极区域下方的有源区域的器件。 有源区具有不同于第一导电类型的第二导电类型。 接触区域与有源区域电接触。 该方法包括在器件的有源区上形成凸起的源极区域，并形成与有源区域相同的导电类型的接触区域，其中有源区域在接触区域和器件的主体之间形成接触体。