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1.发明申请METHOD AND CIRCUIT FOR INCREASING THE RESOLUTION OF A DIGITALLY CONTROLLED OSCILLATOR 有权用于增加数字控制振荡器分辨率的方法和电路公开(公告)号：US20130027149A1
公开(公告)日：2013-01-31
申请号：US13297904
申请日：2011-11-16
IPC分类号： H03B1/00
CPC分类号： H03K4/501
摘要： A method and a circuit for increasing a resolution of a digitally controlled oscillator include controlling the oscillator so that an output signal of the oscillator varies between semi-periods having a first frequency and semi-periods having a second frequency. The method and circuit further include applying the output signal of the oscillator as an input to a divider to obtain a divided signal. A frequency of at least one semi-period of the divided signal is a function of both an oscillator semi-period having the first frequency and an oscillator semi-period having the second frequency.
摘要翻译： 用于增加数字控制振荡器的分辨率的方法和电路包括控制振荡器，使得振荡器的输出信号在具有第一频率和具有第二频率的半周期的半周期之间变化。 该方法和电路还包括将振荡器的输出信号作为输入施加到分频器以获得分频信号。 分频信号的至少一个半周期的频率是具有第一频率的振荡器半周期和具有第二频率的振荡器半周期两者的函数。
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2.发明授权Method and circuit for increasing the resolution of a digitally controlled oscillator 有权用于提高数字控制振荡器分辨率的方法和电路公开(公告)号：US08604890B2
公开(公告)日：2013-12-10
申请号：US13297904
申请日：2011-11-16
CPC分类号： H03K4/501
摘要： A method and a circuit for increasing a resolution of a digitally controlled oscillator include controlling the oscillator so that an output signal of the oscillator varies between semi-periods having a first frequency and semi-periods having a second frequency. The method and circuit further include applying the output signal of the oscillator as an input to a divider to obtain a divided signal. A frequency of at least one semi-period of the divided signal is a function of both an oscillator semi-period having the first frequency and an oscillator semi-period having the second frequency.
摘要翻译： 用于增加数字控制振荡器的分辨率的方法和电路包括控制振荡器，使得振荡器的输出信号在具有第一频率和具有第二频率的半周期的半周期之间变化。 该方法和电路还包括将振荡器的输出信号作为输入施加到分频器以获得分频信号。 分频信号的至少一个半周期的频率是具有第一频率的振荡器半周期和具有第二频率的振荡器半周期两者的函数。
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公开(公告)号：US08760216B2
公开(公告)日：2014-06-24
申请号：US12762456
申请日：2010-04-19
IPC分类号： G05F1/10
摘要： A reference voltage generator circuit may include at least one MOS transistor and at least one bipolar transistor coupled together to provide an electrical path from an input reference potential to an output of the generator circuit. The electrical path may extend through a gate-to-source path of the MOS transistor and further through a base-to-emitter path of the bipolar transistor. The MOS transistor may be biased by a bias current that is proportional to T2·μ(T), where T represents absolute temperature and μ(T) represents mobility of a MOS transistor in the bias current generator. Optionally, the reference voltage generator may include N MOS and M multiple bipolar transistors (N≧1, M≧1), and the output reference voltage may be N*VGS+M*VBE as compared to the input reference potential.
摘要翻译： 参考电压发生器电路可以包括至少一个MOS晶体管和耦合在一起的至少一个双极晶体管，以提供从输入参考电位到发生器电路的输出的电路径。 电路可以延伸穿过MOS晶体管的栅极到源极的路径，并进一步穿过双极晶体管的基极到发射极的路径。 可以通过与T2·μ（T）成比例的偏置电流来偏置MOS晶体管，其中T表示绝对温度，μ（T）表示偏置电流发生器中MOS晶体管的迁移率。 可选地，参考电压发生器可以包括N个MOS和M个多极双极晶体管（N≥1，M≥1），并且与输入的参考电位相比，输出参考电压可以是N * VGS + M * VBE。
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公开(公告)号：US20120249185A1
公开(公告)日：2012-10-04
申请号：US13076814
申请日：2011-03-31
IPC分类号： H03K5/153
CPC分类号： H03K17/0822 , H03K2217/0045
摘要： A detection circuit is coupled to an output terminal of a driver circuit. The detection circuit includes a comparator to compare a signal at the output terminal to a reference signal corresponding to a signal that would be generated if a capacitive load having a relatively high capacitance value were connected to the output terminal. Output of the comparator is sampled at a predetermined time after the driver circuit provides the drive signal. An error signal is generated when the sampled output indicates that the capacitive load having the relatively high capacitance value is actually connected to the output terminal.
摘要翻译： 检测电路耦合到驱动器电路的输出端。 检测电路包括比较器，用于将输出端子处的信号与对应于如果具有相对高的电容值的电容性负载连接到输出端子将产生的信号相比较的参考信号。 在驱动器电路提供驱动信号之后的预定时间对比较器的输出进行采样。 当采样输出指示具有相对较高电容值的电容性负载实际连接到输出端时，产生误差信号。
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公开(公告)号：US20130050132A1
公开(公告)日：2013-02-28
申请号：US13218788
申请日：2011-08-26
申请人： Javier Calpe Maravilla , Alberto Marinas , Santiago Iriarte , Enrique Company Bosch , Miguel Chanca , Reza Alavi , Vladimir Friedman , John Cleary
发明人： Javier Calpe Maravilla , Alberto Marinas , Santiago Iriarte , Enrique Company Bosch , Miguel Chanca , Reza Alavi , Vladimir Friedman , John Cleary
IPC分类号： G06F3/045
CPC分类号： G06F3/044 , G06F1/3262 , G06F3/0418
摘要： Techniques to control a capacitive touch screen that decrease processing time and increase noise rejection. The techniques may include injecting a plurality of excitation signals having unique spectral profiles onto conductors of the capacitive touch screen, sampling signals returned from the screen, and determining a location of touch. The techniques may further include injecting a plurality of excitation signals having unique spectral profiles onto adjacent or non-adjacent conductors of the capacitive touch screen. The techniques may further include injecting a plurality of excitation signals having unique spectral profiles onto conductors of the capacitive touch screen in unequal measures. The techniques may also include mapping frequency characteristics of noise present on the capacitive touch screen.
摘要翻译： 用于控制电容式触摸屏的技术，其减少处理时间并增加噪声抑制。 这些技术可以包括将具有独特光谱轮廓的多个激励信号注入到电容式触摸屏的导体上，从屏幕返回的采样信号以及确定触摸的位置。 这些技术可以进一步包括将具有唯一光谱轮廓的多个激励信号注入到电容式触摸屏的相邻或非相邻导体上。 这些技术可以进一步包括以不相等的措施将具有独特光谱分布的多个激励信号注入到电容式触摸屏的导体上。 这些技术还可以包括映射存在于电容式触摸屏上的噪声的频率特性。
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6.发明授权Integrated PWM slope control driving mechanism for gradually delivering energy to a capacitive load 有权集成PWM斜率控制驱动机制，用于逐渐向容性负载输送能量公开(公告)号：US08330324B2
公开(公告)日：2012-12-11
申请号：US12796364
申请日：2010-06-08
CPC分类号： H01L41/042 , H02N2/0075
摘要： An apparatus, system and method for controlling drive patterns is disclosed. A digital engine for controlling drive patterns may include a profile controller to program characteristics of one or more drive patterns for one or more piezoelectric actuators. The digital engine may further include a register array to store profile information for the one or more drive patterns. Each drive pattern may comprise a plurality of pulses with each pulse having a slope. The digital engine may also include a digital pattern generator to generate the one or more drive patterns based upon the profile information stored in the register array. The digital engine may further include a slope shaping circuit to modify one or more signals based upon an input from the digital pattern generator.
摘要翻译： 公开了一种用于控制驱动模式的装置，系统和方法。 用于控制驱动模式的数字引擎可以包括轮廓控制器，用于编程一个或多个压电致动器的一个或多个驱动模式的特性。 数字引擎还可以包括用于存储一个或多个驱动模式的简档信息的寄存器阵列。 每个驱动模式可以包括多个脉冲，每个脉冲具有斜率。 数字引擎还可以包括数字模式发生器，以基于存储在寄存器阵列中的简档信息生成一个或多个驱动模式。 数字引擎还可以包括斜率整形电路，以根据来自数字模式发生器的输入来修改一个或多个信号。
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7.发明申请INTEGRATED PWM SLOPE CONTROL DRIVING MECHANISM FOR GRADUALLY DELIVERING ENERGY TO A CAPACITIVE LOAD 有权集成PWM斜率控制驱动机制，将能量传递给电容负载公开(公告)号：US20100309366A1
公开(公告)日：2010-12-09
申请号：US12796364
申请日：2010-06-08
CPC分类号： H01L41/042 , H02N2/0075
摘要： An apparatus, system and method for controlling drive patterns is disclosed. A digital engine for controlling drive patterns may include a profile controller to program characteristics of one or more drive patterns for one or more piezoelectric actuators. The digital engine may further include a register array to store profile information for the one or more drive patterns. Each drive pattern may comprise a plurality of pulses with each pulse having a slope. The digital engine may also include a digital pattern generator to generate the one or more drive patterns based upon the profile information stored in the register array. The digital engine may further include a slope shaping circuit to modify one or more signals based upon an input from the digital pattern generator.
摘要翻译： 公开了一种用于控制驱动模式的装置，系统和方法。 用于控制驱动模式的数字引擎可以包括轮廓控制器，用于编程一个或多个压电致动器的一个或多个驱动模式的特性。 数字引擎还可以包括用于存储一个或多个驱动模式的简档信息的寄存器阵列。 每个驱动模式可以包括多个脉冲，每个脉冲具有斜率。 数字引擎还可以包括数字模式发生器，以基于存储在寄存器阵列中的简档信息来生成一个或多个驱动模式。 数字引擎还可以包括斜率整形电路，以根据来自数字模式发生器的输入来修改一个或多个信号。
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公开(公告)号：US08928296B2
公开(公告)日：2015-01-06
申请号：US13112335
申请日：2011-05-20
申请人： Santiago Iriarte , Alberto Marinas
发明人： Santiago Iriarte , Alberto Marinas
摘要： A low dropout voltage regulator (LDO) includes first and second amplifiers and a current mirror. The first amplifier includes a first input receiving a reference voltage and a second input receiving a voltage proportional to an output of the LDO. The current mirror includes an input current at a first end of the current mirror to an output current at a second end of the current mirror, the input current controlled by an output of the first amplifier and the output current being supplied to the output of the LDO. The second amplifier includes a first input coupled to the first end of the current mirror and a second input coupled to the second end of the current mirror.
摘要翻译： 低压差稳压器（LDO）包括第一和第二放大器和电流镜。 第一放大器包括接收参考电压的第一输入端和接收与LDO的输出成正比的电压的第二输入端。 电流镜包括在电流镜的第一端处的输入电流到电流镜的第二端处的输出电流，由第一放大器的输出控制的输入电流和输出电流被提供给电流镜的输出 我愿意。 第二放大器包括耦合到电流镜的第一端的第一输入和耦合到电流镜的第二端的第二输入。
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公开(公告)号：US08330505B2
公开(公告)日：2012-12-11
申请号：US13076814
申请日：2011-03-31
IPC分类号： H03K3/00
CPC分类号： H03K17/0822 , H03K2217/0045
摘要： A detection circuit is coupled to an output terminal of a driver circuit. The detection circuit includes a comparator to compare a signal at the output terminal to a reference signal corresponding to a signal that would be generated if a capacitive load having a relatively high capacitance value were connected to the output terminal. Output of the comparator is sampled at a predetermined time after the driver circuit provides the drive signal. An error signal is generated when the sampled output indicates that the capacitive load having the relatively high capacitance value is actually connected to the output terminal.
摘要翻译： 检测电路耦合到驱动器电路的输出端。 检测电路包括比较器，用于将输出端子处的信号与对应于如果具有相对高的电容值的电容性负载连接到输出端子将产生的信号相比较的参考信号。 在驱动器电路提供驱动信号之后的预定时间对比较器的输出进行采样。 当采样输出指示具有相对较高电容值的电容性负载实际连接到输出端时，产生误差信号。
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公开(公告)号：US08212617B2
公开(公告)日：2012-07-03
申请号：US12652442
申请日：2010-01-05
IPC分类号： H03F3/18
CPC分类号： H03F3/3023 , H03F2200/91 , H03F2203/30111
摘要： A system for a Class AB Amplifier output stage that includes a first push pull system connected to an output terminal including a first driving transistor coupled to the output terminal and a second push pull system connected to the output terminal including a second driving transistor coupled to the output terminal. The amplifier also includes a current mode amplifier where the current mode amplifier's output is coupled to the first driving transistor's gate. The amplifier further includes a pair of resistors, a first resistor coupled to a first input terminal of the current mode amplifier, a second resistor coupled to a second input terminal of the current mode amplifier and coupled to the second driving transistor.
摘要翻译： 一种用于AB类放大器输出级的系统，包括连接到输出端的第一推挽系统，所述第一推挽系统包括耦合到所述输出端子的第一驱动晶体管和连接到所述输出端子的第二推挽系统，所述第二推挽系统包括耦合到所述输出端 输出端子。 放大器还包括电流模式放大器，其中电流模式放大器的输出耦合到第一驱动晶体管的栅极。 放大器还包括一对电阻器，耦合到电流模式放大器的第一输入端子的第一电阻器，耦合到电流模式放大器的第二输入端子并耦合到第二驱动晶体管的第二电阻器。
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