公开(公告)号：US08472513B2

公开(公告)日：2013-06-25

申请号：US12353860

申请日：2009-01-14

申请人： Amaresh Malipatil ,  Lizhi Zhong ,  Wenyi Jin ,  Ye Liu

发明人： Amaresh Malipatil ,  Lizhi Zhong ,  Wenyi Jin ,  Ye Liu

IPC分类号： H04B3/46

CPC分类号： H04L25/03057 ,  H04L25/03343

摘要： Disclosed is a method and system that adapts coefficients of taps of a Finite Impulse Response (FIR) filter to increase elimination of Inter-Symbol Interference (ISI) introduced into a digital communications signal due to distortion characteristics caused by a real-world communications channel. In the communications system there is a Finite Impulse Response (FIR) filter. The FIR filter has at least one pre and/or post cursor tap that removes pre and/or post cursor ISI from the signal, respectively. The pre/post cursor taps each have pre/post cursor coefficients, respectively, that adjusts the effect of the pre/post cursor portion of the FIR filter. The FIR filtered signal is transmitted over the channel which distorts the signal due to the changing and/or static distortion characteristics of the channel. The channel distorted signal is received at a receiver that may pass the channel distorted signal through a quantifier/decision system (e.g., a slicer) as the quantifier input signal to quantify the quantifier input signal to one of multiple digital values. The channel distorted signal may be further adjusted by summing the channel distorted signal with the output of a Decision Feedback Equalizer (DFE) filter to create a DFE corrected signal which then becomes the quantifier input signal. An error signal is determined by finding the difference between the scaled quantifier decision and the quantifier input signal. The pre/post cursor coefficient values that adjust the effects of the pre/post cursor taps of the FIR filter are updated as a function of the error signal and at least two quantifier decision values, and update coefficient values, may be sent over a communications back-channel to the FIR filter.

摘要翻译： 公开了一种适应有限脉冲响应（FIR）滤波器的抽头的系数的方法和系统，以增加由于真实世界通信信道引起的失真特性引入到数字通信信号中的符号间干扰（ISI）的消除。 在通信系统中有一个有限脉冲响应（FIR）滤波器。 FIR滤波器具有至少一个前和/或后光标分接头，分别从信号中去除前和/或后光标ISI。 前/后光标分接头各自具有调整FIR滤波器的前/后光标部分的效果的前/后光标系数。 FIR滤波信号通过信道传输，由于信道的变化和/或静态失真特性而使信号发生变形。 在接收机处接收信道失真信号，该接收机可以通过量化器/判定系统（例如，限幅器）将信道失真信号作为量化器输入信号来传送，以将量化器输入信号量化为多个数字值之一。 可以通过将信道失真信号与判决反馈均衡器（DFE）滤波器的输出相加来进一步调整信道失真信号，以产生DFE校正信号，然后该信号变为量化器输入信号。 通过找出缩放的量化器判定与量化器输入信号之间的差异来确定误差信号。 调整FIR滤波器的前/后光标抽头的效果的前/后光标系数值作为误差信号的函数被更新，并且可以通过通信发送至少两个量化器判定值和更新系数值 返回通道到FIR滤波器。

公开(公告)号：US20100177816A1

公开(公告)日：2010-07-15

申请号：US12353860

申请日：2009-01-14

申请人： Amaresh Malipatil ,  Lizhi Zhong ,  Wenyi Jin ,  Ye Liu

发明人： Amaresh Malipatil ,  Lizhi Zhong ,  Wenyi Jin ,  Ye Liu

IPC分类号： H03H7/40

CPC分类号： H04L25/03057 ,  H04L25/03343

摘要： Disclosed is a method and system that adapts coefficients of taps of a Finite Impulse Response (FIR) filter to increase elimination of Inter-Symbol Interference (ISI) introduced into a digital communications signal due to distortion characteristics caused by a real-world communications channel. In the communications system there is a Finite Impulse Response (FIR) filter. The FIR filter has at least one pre and/or post cursor tap that removes pre and/or post cursor ISI from the signal, respectively. The pre/post cursor taps each have pre/post cursor coefficients, respectively, that adjusts the effect of the pre/post cursor portion of the FIR filter. The FIR filtered signal is transmitted over the channel which distorts the signal due to the changing and/or static distortion characteristics of the channel. The channel distorted signal is received at a receiver that may pass the channel distorted signal through a quantifier/decision system (e.g., a slicer) as the quantifier input signal to quantify the quantifier input signal to one of multiple digital values. The channel distorted signal may be further adjusted by summing the channel distorted signal with the output of a Decision Feedback Equalizer (DFE) filter to create a DFE corrected signal which then becomes the quantifier input signal. An error signal is determined by finding the difference between the scaled quantifier decision and the quantifier input signal. The pre/post cursor coefficient values that adjust the effects of the pre/post cursor taps of the FIR filter are updated as a function of the error signal and at least two quantifier decision values, and update coefficient values, may be sent over a communications back-channel to the FIR filter.

摘要翻译： 公开了一种适应有限脉冲响应（FIR）滤波器的抽头的系数的方法和系统，以增加由于真实世界通信信道引起的失真特性引入到数字通信信号中的符号间干扰（ISI）的消除。 在通信系统中有一个有限脉冲响应（FIR）滤波器。 FIR滤波器具有至少一个前和/或后光标分接头，分别从信号中去除前和/或后光标ISI。 前/后光标分接头各自具有调整FIR滤波器的前/后光标部分的效果的前/后光标系数。 FIR滤波信号通过信道传输，由于信道的变化和/或静态失真特性而使信号发生变形。 在接收机处接收信道失真信号，该接收机可以通过量化器/判定系统（例如，限幅器）将信道失真信号作为量化器输入信号来传送，以将量化器输入信号量化为多个数字值之一。 可以通过将信道失真信号与判决反馈均衡器（DFE）滤波器的输出相加来进一步调整信道失真信号，以产生DFE校正信号，然后该信号变为量化器输入信号。 通过找出缩放的量化器判定与量化器输入信号之间的差异来确定误差信号。 调整FIR滤波器的前/后光标抽头的效果的前/后光标系数值作为误差信号的函数被更新，并且可以通过通信发送至少两个量化器判定值和更新系数值 返回通道到FIR滤波器。

公开(公告)号：US08324019B2

公开(公告)日：2012-12-04

申请号：US12469985

申请日：2009-05-21

申请人： George C. Tang ,  Lizhi Zhong ,  Freeman Y. Zhong ,  Wenyi Jin ,  Jeffrey A. Hall

发明人： George C. Tang ,  Lizhi Zhong ,  Freeman Y. Zhong ,  Wenyi Jin ,  Jeffrey A. Hall

IPC分类号： H01L21/00

CPC分类号： H01L23/50 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K1/112

摘要： A method of minimizing crosstalk in an IC package including (A) routing a first signal between first pads and a first trace layer in an congested area, (B) routing the first signal between the first and second trace layers in an non-congested area, (C) routing the first signal between the second trace layer and first pins in the non-congested area, (D) routing a second signal between second pads and the first trace layer in the congested area, (E) routing the second signal between the first and the second trace layers in the congested area and (F) routing the second signal between the second trace layer and second pins in the non-congested area, wherein (i) all of the first and second pins are arranged along a line and (ii) the first pins are offset from the second pins by a gap of at least two inter-pin spaces.

摘要翻译： 一种使IC封装中的串扰最小化的方法，包括：（A）在第一焊盘和拥堵区域中的第一迹线层之间路由第一信号;（B）在非拥塞区域中路由第一和第二迹线层之间的第一信号 （C）在第二跟踪层和非拥塞区域中的第一引脚之间路由第一信号，（D）在第二焊盘和拥塞区域中的第一跟踪层之间路由第二信号，（E）将第二信号 在所述拥挤区域中的所述第一和第二迹线层之间，以及（F）在所述非拥挤区域中的所述第二迹线层和所述第二引脚之间布置所述第二信号，其中（i）所有所述第一和第二引脚沿着 并且（ii）第一引脚与至少两个引脚间空间的间隙从第二引脚偏移。

公开(公告)号：US20090289348A1

公开(公告)日：2009-11-26

申请号：US12469985

申请日：2009-05-21

申请人： George C. Tang ,  Lizhi Zhong ,  Freeman Y. Zhong ,  Wenyi Jin ,  Jeffrey A. Hall

发明人： George C. Tang ,  Lizhi Zhong ,  Freeman Y. Zhong ,  Wenyi Jin ,  Jeffrey A. Hall

IPC分类号： H01L23/498 ,  H04L5/14

CPC分类号： H01L23/50 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K1/112

摘要： A method of minimizing crosstalk in an IC package including (A) routing a first signal between first pads and a first trace layer in an congested area, (B) routing the first signal between the first and second trace layers in an non-congested area, (C) routing the first signal between the second trace layer and first pins in the non-congested area, (D) routing a second signal between second pads and the first trace layer in the congested area, (E) routing the second signal between the first and the second trace layers in the congested area and (F) routing the second signal between the second trace layer and second pins in the non-congested area, wherein (i) all of the first and second pins are arranged along a line and (ii) the first pins are offset from the second pins by a gap of at least two inter-pin spaces.

摘要翻译： 一种使IC封装中的串扰最小化的方法，包括：（A）在第一焊盘和拥堵区域中的第一迹线层之间路由第一信号;（B）在非拥塞区域中路由第一和第二迹线层之间的第一信号 （C）在第二跟踪层和非拥塞区域中的第一引脚之间路由第一信号，（D）在第二焊盘和拥塞区域中的第一跟踪层之间路由第二信号，（E）将第二信号 在所述拥挤区域中的所述第一和第二迹线层之间，以及（F）在所述非拥挤区域中的所述第二迹线层和所述第二引脚之间布置所述第二信号，其中（i）所有所述第一和第二引脚沿着 并且（ii）第一引脚与至少两个引脚间空间的间隙从第二引脚偏移。

公开(公告)号：US20100290515A1

公开(公告)日：2010-11-18

申请号：US12467507

申请日：2009-05-18

申请人： Xingdong Dai ,  Wenyi Jin ,  Max J. Olsen ,  Geoffrey Zhang

发明人： Xingdong Dai ,  Wenyi Jin ,  Max J. Olsen ,  Geoffrey Zhang

IPC分类号： H03H7/40

CPC分类号： H04L25/03057

摘要： A receiver comprises equalization circuitry implementing at least first and second gain adaptation loops associated with respective first and second frequency bands. The equalization circuitry in one aspect is operative to identify a pattern in a portion of a received serial data stream, and to perform gain adaptation for the receiver utilizing a particular one of the gain adaptation loops responsive to the identified pattern. For example, the gain adaptation may be performed utilizing a low frequency gain adaptation loop if the detected pattern is of a first type generally associated with a low frequency band, and may be performed utilizing a high frequency gain adaptation loop if the detected pattern is of a second type generally associated with a high frequency band. In other aspects, the first and second gain adaptation loops may be activated in a particular serial order or in parallel.

摘要翻译： 接收机包括实现与相应的第一和第二频带相关联的至少第一和第二增益适配环路的均衡电路。 一个方面中的均衡电路用于识别接收的串行数据流的一部分中的模式，并且响应于所识别的模式，利用增益适配环路中的特定一个对接收机执行增益适配。 例如，如果检测到的模式是通常与低频带相关联的第一类型，则可以利用低频增益适配环来执行增益适配，并且如果检测到的模式是 通常与高频带相关联的第二类型。 在其他方面，可以以特定的串行顺序或并行地激活第一和第二增益适配环。

公开(公告)号：US20080052594A1

公开(公告)日：2008-02-28

申请号：US11494921

申请日：2006-07-28

申请人： Jonathan S. Yedidia ,  Marc P. Fossorier ,  Jeffrey S. Proctor ,  Wenyi Jin ,  Yige Wang

发明人： Jonathan S. Yedidia ,  Marc P. Fossorier ,  Jeffrey S. Proctor ,  Wenyi Jin ,  Yige Wang

IPC分类号： H03M13/00

CPC分类号： H03M13/116 ,  H03M13/1105 ,  H03M13/1111 ,  H03M13/112 ,  H03M13/1122 ,  H03M13/6583

摘要： A block of symbols are decoded using iterative belief propagation. A set of belief registers store beliefs that a corresponding symbol in the block has a certain value. Check processors determine output check-to-bit messages from input bit-to-check messages by message-update rules. Link processors connect the set of belief registers to the check processors. Each link processor has an associated message register. Messages and beliefs are passed between the set of belief registers and the check processors via the link processors for a predetermined number of iterations while updating the beliefs to decode the block of symbols based on the beliefs at termination.

摘要翻译： 使用迭代置信传播来解码符号块。 一组信念寄存器存储块中相应符号具有一定值的信念。 检查处理器通过消息更新规则确定从输入位到检查消息的输出检查到位消息。 链接处理器将一组置信寄存器连接到检查处理器。 每个链接处理器都有一个关联的消息寄存器。 消息和信念通过链接处理器在一组置信寄存器和检查处理器之间传递预定数量的迭代，同时基于终止的信念来更新信念以解码符号块。