公开(公告)号：US20240354012A1

公开(公告)日：2024-10-24

申请号：US18760849

申请日：2024-07-01

Applicant: Ambiq Micro, Inc.

Inventor： Daniel Martin Cermak ,  Scott McLean Hanson ,  Yousof Mortazavi ,  Ramakanth Kondagunturi

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0626 ,  G06F3/0655 ,  G06F3/0673

Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

公开(公告)号：US20230376222A1

公开(公告)日：2023-11-23

申请号：US17981149

申请日：2022-11-04

Applicant: Ambiq Micro, Inc.

Inventor： Daniel Martin Cermak ,  Scott McLean Hanson ,  Yousof Mortazavi ,  Ramakanth Kondagunturi

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0626 ,  G06F3/0655 ,  G06F3/0673

Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

公开(公告)号：US11520499B1

公开(公告)日：2022-12-06

申请号：US17747410

申请日：2022-05-18

Applicant: Ambiq Micro, Inc.

Inventor： Daniel Martin Cermak ,  Scott McLean Hanson ,  Yousof Mortazavi ,  Ramakanth Kondagunturi

IPC: G06F3/06

Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

公开(公告)号：US12050789B2

公开(公告)日：2024-07-30

申请号：US17981149

申请日：2022-11-04

Applicant: Ambiq Micro, Inc.

Inventor： Daniel Martin Cermak ,  Scott McLean Hanson ,  Yousof Mortazavi ,  Ramakanth Kondagunturi

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0626 ,  G06F3/0655 ,  G06F3/0673

Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.