Power Efficient Context-Based Audio Processing

    公开(公告)号:US20220030354A1

    公开(公告)日:2022-01-27

    申请号:US17495661

    申请日:2021-10-06

    Abstract: A low power voice processing system that includes a plurality of non-audio sensors, at least one microphone system, and a plurality of audio modules, at least some of which can be configured in selected modes. A context determination module is connected to the plurality of audio modules, and further connected to receive input from the plurality of non-audio sensors and the at least one microphone system. The context determination module acts to determine use context for the voice processing system and at least in part selects mode operation of at least some of the plurality of audio modules.

    Very Low Power Microcontroller System
    3.
    发明申请

    公开(公告)号:US20190079573A1

    公开(公告)日:2019-03-14

    申请号:US15933153

    申请日:2018-03-22

    Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

    ON-DEMAND ACTIVATION OF MEMORY PATH DURING SLEEP OR ACTIVE MODES

    公开(公告)号:US20240354012A1

    公开(公告)日:2024-10-24

    申请号:US18760849

    申请日:2024-07-01

    CPC classification number: G06F3/0625 G06F3/0626 G06F3/0655 G06F3/0673

    Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

    ON-DEMAND ACTIVATION OF MEMORY PATH DURING SLEEP OR ACTIVE MODES

    公开(公告)号:US20230376222A1

    公开(公告)日:2023-11-23

    申请号:US17981149

    申请日:2022-11-04

    CPC classification number: G06F3/0625 G06F3/0626 G06F3/0655 G06F3/0673

    Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

    On-demand activation of memory path during sleep or active modes

    公开(公告)号:US11520499B1

    公开(公告)日:2022-12-06

    申请号:US17747410

    申请日:2022-05-18

    Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.

    Power efficient context-based audio processing

    公开(公告)号:US11172293B2

    公开(公告)日:2021-11-09

    申请号:US16508062

    申请日:2019-07-10

    Abstract: A low power voice processing system that includes a plurality of non-audio sensors, at least one microphone system, and a plurality of audio modules, at least some of which can be configured in selected modes. A context determination module is connected to the plurality of audio modules, and further connected to receive input from the plurality of non-audio sensors and the at least one microphone system. The context determination module acts to determine use context for the voice processing system and at least in part selects mode operation of at least some of the plurality of audio modules.

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