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公开(公告)号:US20220030354A1
公开(公告)日:2022-01-27
申请号:US17495661
申请日:2021-10-06
Applicant: Ambiq Micro, Inc.
Inventor: Arpit Shah , Scott McLean Hanson , Stephen Howard Nease
IPC: H04R3/04 , G06F3/16 , G06F3/01 , G06F40/205
Abstract: A low power voice processing system that includes a plurality of non-audio sensors, at least one microphone system, and a plurality of audio modules, at least some of which can be configured in selected modes. A context determination module is connected to the plurality of audio modules, and further connected to receive input from the plurality of non-audio sensors and the at least one microphone system. The context determination module acts to determine use context for the voice processing system and at least in part selects mode operation of at least some of the plurality of audio modules.
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公开(公告)号:US10795425B2
公开(公告)日:2020-10-06
申请号:US16005315
申请日:2018-06-11
Applicant: Ambiq Micro, Inc.
Inventor: Scott McLean Hanson , Daniel Martin Cermak , Eric Jonathan Deal , Stephen James Sheafor , Donovan Scott Popps , Mark A Baur
IPC: G06F1/32 , G06F1/26 , G06F1/3234 , G06F1/3287 , G06F1/3203 , G06F1/3237 , G11C5/14 , G06F1/3296
Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.
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公开(公告)号:US20190079573A1
公开(公告)日:2019-03-14
申请号:US15933153
申请日:2018-03-22
Applicant: Ambiq Micro, Inc.
Inventor: Scott McLean Hanson , Daniel Martin Cermak , Eric Jonathan Deal , Stephen James Sheafor , Donovan Scott Popps , Mark A. Baur
IPC: G06F1/32
Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.
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公开(公告)号:US20240354012A1
公开(公告)日:2024-10-24
申请号:US18760849
申请日:2024-07-01
Applicant: Ambiq Micro, Inc.
IPC: G06F3/06
CPC classification number: G06F3/0625 , G06F3/0626 , G06F3/0655 , G06F3/0673
Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.
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公开(公告)号:US10788884B2
公开(公告)日:2020-09-29
申请号:US16013767
申请日:2018-06-20
Applicant: Ambiq Micro, Inc.
Inventor: Scott McLean Hanson , Daniel Martin Cermak , Eric Jonathan Deal , Stephen James Sheafor , Donovan Scott Popps , Mark A Baur
IPC: G06F1/32 , G06F1/26 , G11C5/14 , G06F1/3234 , G06F1/3287 , G06F1/3203 , G06F1/3237 , G06F1/3296
Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.
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公开(公告)号:US20200257352A1
公开(公告)日:2020-08-13
申请号:US16864155
申请日:2020-05-01
Applicant: Ambiq Micro, Inc.
Inventor: Scott McLean Hanson , Daniel Martin Cermak , Eric Jonathan Deal , Stephen James Sheafor , Donovan Scott Popps , Mark A. Baur
IPC: G06F1/3234 , G06F1/3296 , G11C5/14 , G06F1/3237 , G06F1/3203 , G06F1/26 , G06F1/3287
Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.
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公开(公告)号:US11849292B2
公开(公告)日:2023-12-19
申请号:US17495661
申请日:2021-10-06
Applicant: Ambiq Micro, Inc.
Inventor: Arpit Shah , Scott McLean Hanson , Stephen Howard Nease
IPC: H04R3/04 , G06F3/16 , G06F3/01 , G06F40/205
CPC classification number: H04R3/04 , G06F3/011 , G06F3/017 , G06F3/167 , G06F40/205
Abstract: A low power voice processing system that includes a plurality of non-audio sensors, at least one microphone system, and a plurality of audio modules, at least some of which can be configured in selected modes. A context determination module is connected to the plurality of audio modules, and further connected to receive input from the plurality of non-audio sensors and the at least one microphone system. The context determination module acts to determine use context for the voice processing system and at least in part selects mode operation of at least some of the plurality of audio modules.
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公开(公告)号:US20230376222A1
公开(公告)日:2023-11-23
申请号:US17981149
申请日:2022-11-04
Applicant: Ambiq Micro, Inc.
IPC: G06F3/06
CPC classification number: G06F3/0625 , G06F3/0626 , G06F3/0655 , G06F3/0673
Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.
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公开(公告)号:US11520499B1
公开(公告)日:2022-12-06
申请号:US17747410
申请日:2022-05-18
Applicant: Ambiq Micro, Inc.
IPC: G06F3/06
Abstract: A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.
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公开(公告)号:US11172293B2
公开(公告)日:2021-11-09
申请号:US16508062
申请日:2019-07-10
Applicant: Ambiq Micro, Inc.
Inventor: Arpit Shah , Scott McLean Hanson , Stephen Howard Nease
IPC: H04R3/04 , G06F3/16 , G06F3/01 , G06F40/205
Abstract: A low power voice processing system that includes a plurality of non-audio sensors, at least one microphone system, and a plurality of audio modules, at least some of which can be configured in selected modes. A context determination module is connected to the plurality of audio modules, and further connected to receive input from the plurality of non-audio sensors and the at least one microphone system. The context determination module acts to determine use context for the voice processing system and at least in part selects mode operation of at least some of the plurality of audio modules.
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