公开(公告)号：US07945706B2

公开(公告)日：2011-05-17

申请号：US12128634

申请日：2008-05-29

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: G06F3/00 ,  G06F13/00

CPC classification number: H04N5/4401 ,  H04N5/46 ,  H04N5/765 ,  H04N21/42615 ,  H04N21/4305 ,  H04N21/436 ,  H04N21/4363

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract translation: 本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。 信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。 输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子 对应于具有该组共享输入端的第二传输规范。 接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

公开(公告)号：US08112127B2

公开(公告)日：2012-02-07

申请号：US12433070

申请日：2009-04-30

Applicant: Chun-Wei Yang ,  Chin-Wei Huang ,  An-Ming Lee

Inventor： Chun-Wei Yang ,  Chin-Wei Huang ,  An-Ming Lee

IPC: H04B1/38

CPC classification number: G06F1/3209 ,  H04L12/40039

Abstract: A communication system capable of adjusting power consumed thereby is adapted for receiving connection information. The communication system includes first and second transceiving devices. The first transceiving device includes a transmitting end and a service end for receiving the connection information. The second transceiving device includes a receiving end capable of forming a communications link with the transmitting end. A power state of each of the first and second transceiving devices is switchable between a power-supplied mode and a power-saving mode. The power state alters status of the communications link.

Abstract translation: 能够调整由此消耗的功率的通信系统适于接收连接信息。 通信系统包括第一和第二收发设备。 第一收发装置包括发送端和用于接收连接信息的服务端。 第二收发装置包括能够与发送端形成通信链路的接收端。 第一和第二收发装置中的每一个的电源状态可在供电模式和省电模式之间切换。 电源状态改变通信链路的状态。

公开(公告)号：US20090286577A1

公开(公告)日：2009-11-19

申请号：US12433070

申请日：2009-04-30

Applicant: Chun-Wei Yang ,  Chin-Wei Huang ,  An-Ming Lee

Inventor： Chun-Wei Yang ,  Chin-Wei Huang ,  An-Ming Lee

IPC: H04B1/40

CPC classification number: G06F1/3209 ,  H04L12/40039

Abstract: A communication system capable of adjusting power consumed thereby is adapted for receiving connection information. The communication system includes first and second transceiving devices. The first transceiving device includes a transmitting end and a service end for receiving the connection information. The second transceiving device includes a receiving end capable of forming a communications link with the transmitting end. A power state of each of the first and second transceiving devices is switchable between a power-supplied mode and a power-saving mode. The power state alters status of the communications link.

Abstract translation: 能够调整由此消耗的功率的通信系统适于接收连接信息。 通信系统包括第一和第二收发设备。 第一收发装置包括发送端和用于接收连接信息的服务端。 第二收发装置包括能够与发送端形成通信链路的接收端。 第一和第二收发装置中的每一个的电源状态可在供电模式和省电模式之间切换。 电源状态改变通信链路的状态。

公开(公告)号：US20080298504A1

公开(公告)日：2008-12-04

申请号：US12125075

申请日：2008-05-22

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: H04L27/06

CPC classification number: H04L25/0272 ,  H04L25/0262

Abstract: The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.

Abstract translation: 本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。 信号接收方法包括：接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。 信号接收电路包括：输入接口，用于接收输入信号; 检测模块，用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元，用于根据信号检测结果确定输入信号的传输格式。

公开(公告)号：US20060208811A1

公开(公告)日：2006-09-21

申请号：US11277039

申请日：2006-03-21

Applicant: An-Ming Lee

Inventor： An-Ming Lee

IPC: H03B27/00

CPC classification number: G06F1/06 ,  H03B27/00

Abstract: A multi-phase clock generator for generating a set of multi-phase clock signals is disclosed. The multi-phase clock generator includes a signal generator, a phase adjusting circuit, and a phase interpolator. The signal generator generates a plurality of first clock signals according to a reference clock signal. The phase adjusting circuit, which is a phase rotator or a phase selecting circuit and coupled to the signal generator receives the first clock signals and adjusts the phases of the first clock signals according to a control signal to generate a plurality of second clock signals. The phase interpolator, which is coupled to the phase adjusting circuit, interpolates the second clock signals to generate the set of multi-phase clock signals.

Abstract translation: 公开了一种用于产生一组多相时钟信号的多相时钟发生器。 多相时钟发生器包括信号发生器，相位调整电路和相位内插器。 信号发生器根据参考时钟信号产生多个第一时钟信号。 作为相位旋转器或相位选择电路并且耦合到信号发生器的相位调整电路接收第一时钟信号，并根据控制信号调整第一时钟信号的相位，以产生多个第二时钟信号。 耦合到相位调整电路的相位内插器插入第二时钟信号以产生一组多相时钟信号。

公开(公告)号：US09215105B2

公开(公告)日：2015-12-15

申请号：US13040267

申请日：2011-03-04

Applicant: Pei-Si Wu ,  An-Ming Lee

Inventor： Pei-Si Wu ,  An-Ming Lee

IPC: H04L25/03

CPC classification number: H04L25/03057 ,  H04L25/03038 ,  H04L2025/0349

Abstract: An equalizer includes a first sampler, a second sampler, and an equalization circuit. The first sampler is used for sampling an input data to generate an output data, and the second sampler is used for sampling the input data to generate an edge information. The equalization circuit is coupled to the first sampler and the second sampler, and includes an equalization unit and a control unit. The equalization unit performs an equalization operation on an original input data in order to generate the input data according to a plurality of tap coefficients. The control unit is coupled to the equalization unit, for adjusting the plurality of tap coefficients according to the output data and the edge information.

Abstract translation: 均衡器包括第一采样器，第二采样器和均衡电路。 第一采样器用于对输入数据进行采样以产生输出数据，第二采样器用于对输入数据进行采样以生成边缘信息。 均衡电路耦合到第一采样器和第二采样器，并且包括均衡单元和控制单元。 均衡单元对原始输入数据执行均衡操作，以便根据多个抽头系数生成输入数据。 控制单元耦合到均衡单元，用于根据输出数据和边缘信息调整多个抽头系数。

公开(公告)号：US20090015722A1

公开(公告)日：2009-01-15

申请号：US12128634

申请日：2008-05-29

Applicant: An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

Inventor： An-Ming Lee ,  Tzu-Chien Tzeng ,  Yu-Pin Chou ,  Tzuo-Bo Lin

IPC: H04N5/44

CPC classification number: H04N5/4401 ,  H04N5/46 ,  H04N5/765 ,  H04N21/42615 ,  H04N21/4305 ,  H04N21/436 ,  H04N21/4363

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract translation: 本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。 信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。 输入接口包括一组共享输入端子，一组第一分离输入端子，用于接收与该组共享输入端子对应的第一传输规格的输入信号，以及一组用于接收输入信号的第二单独输入端子 对应于具有该组共享输入端的第二传输规范。 接口电路包括耦合到用于提供控制信号的输入接口的控制电路，以及耦合到输入接口和控制电路的处理模块，用于根据控制信号处理输入信号以产生输出信号。

公开(公告)号：US07170364B2

公开(公告)日：2007-01-30

申请号：US11111087

申请日：2005-04-20

Applicant: Chao-Cheng Lee ,  An-Ming Lee

Inventor： Chao-Cheng Lee ,  An-Ming Lee

IPC: H03H7/40

CPC classification number: H03H7/40

Abstract: The present invention discloses an impedance matching circuit with automatic adjustment and a method thereof. The impedance matching circuit comprises: a resistor, for receiving a reference voltage and generating a reference current; a detection unit, for detecting resistance variation and generating a plurality of comparison voltages according to said reference current; a comparison unit, for comparing said reference voltage with said comparison voltages, and generating a control signal; and a composite resistor unit, for receiving said control signal and generating a matched impedance. Therefore, a matched impedance value can be obtained within a designed range in despite of the manufacturing process and the operation environment.

Abstract translation: 本发明公开了一种具有自动调整的阻抗匹配电路及其方法。 阻抗匹配电路包括：电阻器，用于接收参考电压并产生参考电流; 检测单元，用于检测电阻变化并根据所述参考电流产生多个比较电压; 比较单元，用于将所述参考电压与所述比较电压进行比较，并产生控制信号; 以及用于接收所述控制信号并产生匹配阻抗的复合电阻器单元。 因此，尽管制造过程和操作环境都能在设计范围内获得匹配的阻抗值。

公开(公告)号：US20110243215A1

公开(公告)日：2011-10-06

申请号：US13040267

申请日：2011-03-04

Applicant: Pei-Si Wu ,  An-Ming Lee

Inventor： Pei-Si Wu ,  An-Ming Lee

IPC: H04L27/01

CPC classification number: H04L25/03057 ,  H04L25/03038 ,  H04L2025/0349

Abstract: An equalizer includes a first sampler, a second sampler, and an equalization circuit. The first sampler is used for sampling an input data to generate an output data, and the second sampler is used for sampling the input data to generate an edge information. The equalization circuit is coupled to the first sampler and the second sampler, and includes an equalization unit and a control unit. The equalization unit performs an equalization operation on an original input data in order to generate the input data according to a plurality of tap coefficients. The control unit is coupled to the equalization unit, for adjusting the plurality of tap coefficients according to the output data and the edge information.

Abstract translation: 均衡器包括第一采样器，第二采样器和均衡电路。 第一采样器用于对输入数据进行采样以产生输出数据，第二采样器用于对输入数据进行采样以生成边缘信息。 均衡电路耦合到第一采样器和第二采样器，并且包括均衡单元和控制单元。 均衡单元对原始输入数据执行均衡操作，以便根据多个抽头系数生成输入数据。 控制单元耦合到均衡单元，用于根据输出数据和边缘信息调整多个抽头系数。

公开(公告)号：USRE41926E1

公开(公告)日：2010-11-16

申请号：US11223913

申请日：2005-09-09

Applicant: An-Ming Lee

Inventor： An-Ming Lee

IPC: H03K5/12

CPC classification number: H03K17/163 ,  H03K19/00361

Abstract: The present invention discloses an output circuit that is able to adjust the output voltage slew rate and avoid short-circuit current, comprising: a control circuit for receiving an input data and generating a first set of control signals based on the input data; an output control device consisting of a first field effect transistor (FET) connected in series with a second field effect transistor (FET) and the point of connection is the output end for generating an output signal; a first capacitor having one end connected to a first working voltage and generates a first control voltage by charging/discharging on another end to control the gate of the first field effect transistor; a first switch for controlling charging/discharging of the first capacitor device based on the first set of control signals; a first current source for providing charging current for the first capacitor device; a second capacitor having one end connected to a second working voltage and generates a second control voltage by charging/discharging on another end to control the gate of the second field effect transistor; a second switch for controlling charging/discharging of the second capacitor device based on the first set of control signal; and a second current source providing charging current for the second capacitor device. The present invention adjusts output voltage slew rate of the output circuit by adjusting the time constant of the first and second capacitor devices.

Abstract translation: 本发明公开了一种能够调节输出电压转换速率并避免短路电流的输出电路，包括：控制电路，用于接收输入数据并基于输入数据产生第一组控制信号; 由与第二场效应晶体管（FET）串联连接的第一场效应晶体管（FET）和连接点组成的输出控制装置是用于产生输出信号的输出端; 第一电容器，其一端连接到第一工作电压，并通过在另一端充电/放电来产生第一控制电压，以控制第一场效应晶体管的栅极; 用于基于所述第一组控制信号控制所述第一电容器装置的充电/放电的第一开关; 用于为第一电容器装置提供充电电流的第一电流源; 第二电容器，其一端连接到第二工作电压，并通过在另一端充电/放电来产生第二控制电压，以控制第二场效应晶体管的栅极; 用于基于所述第一组控制信号控制所述第二电容器装置的充电/放电的第二开关; 以及为第二电容器装置提供充电电流的第二电流源。 本发明通过调整第一和第二电容器装置的时间常数来调节输出电路的输出电压转换速率。