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1.发明授权Receiver for an integrated heterodyne communication system including BAW-type resonators 有权用于集成外差通信系统的接收机，包括BAW型谐振器公开(公告)号：US07623837B2
公开(公告)日：2009-11-24
申请号：US11125291
申请日：2005-05-09
申请人： Andreia Cathelin , Didier Belot
发明人： Andreia Cathelin , Didier Belot
IPC分类号： H04B1/10
CPC分类号： H03H7/0169 , H03H9/74 , H04B1/28
摘要： A heterodyne receiving circuit for a digital communication system including a first band pass filter receiving a signal from an antenna, an amplifying circuit and a second narrow band pass filter for selecting one particular channel within a band of frequencies. The two filters are carried out with integrated BAW-type tunable resonators which can be adjusted, respectively, by a first electrical signal and a second electrical signal generated by two PLL-type frequency control loops. The second frequency control loop has a variable division factor for the purpose of selecting one particular channel within said band of frequencies. In addition, the receiving circuit includes a mixer for mixing the signal generated at the output of said second filter with a local oscillation frequency in order to produce an intermediate frequency. The division factor is controlled by a digital processing of the intermediate frequency.
摘要翻译： 一种用于数字通信系统的外差接收电路，包括接收来自天线的信号的第一带通滤波器，放大电路和用于选择频带内的一个特定信道的第二窄带通滤波器。 两个滤波器由集成的BAW型可调谐谐振器进行，分别可以通过由两个PLL型频率控制回路产生的第一电信号和第二电信号来调节。 第二频率控制回路具有可变分频因子，用于选择所述频带内的一个特定信道。 此外，接收电路包括用于将在所述第二滤波器的输出处产生的信号与本地振荡频率混合的混频器，以便产生中频。 分频因子由中频数字处理控制。
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公开(公告)号：US07345554B2
公开(公告)日：2008-03-18
申请号：US11025775
申请日：2004-12-29
申请人： Andreia Cathelin , Didier Belot
发明人： Andreia Cathelin , Didier Belot
IPC分类号： H03B5/30
CPC分类号： H03L7/0805 , H03B5/366 , H03J3/185 , H03J3/20 , H03J3/22 , H03J3/24 , H03L5/00 , H03L7/00 , H03L7/099
摘要： A phase-locked loop that can be integrated into a semiconductor product comprises: a phase comparator having a first input, a second input and an output, said first input receiving a reference frequency; a low-pass filter having an input connected to said output of said phase comparator and having an output generating an electric control signal (Vtune); an oscillating circuit generating a predefined frequency signal to be controlled; a dividing block having an input receiving the oscillating signal and an output connected to said second input of said phase comparator. The oscillating circuit comprises a BAW-type acoustic resonator having first and second resonant frequencies and associated with a first inductive partner element to cancel out said second resonant frequency and with a second capacitive partner element for regulating said first resonant frequency, said at least first resonator component being adjusted via said electric signal (Vtune).
摘要翻译： 可以集成到半导体产品中的锁相环包括：具有第一输入，第二输入和输出的相位比较器，所述第一输入接收参考频率; 低通滤波器，具有连接到所述相位比较器的所述输出的输入端，并且具有产生电控制信号（V调谐）的输出; 产生要被控制的预定频率信号的振荡电路; 具有接收振荡信号的输入的分频块和连接到所述相位比较器的所述第二输入的输出。 振荡电路包括具有第一和第二谐振频率并与第一电感对象元件相关联以抵消所述第二谐振频率的BAW型声谐振器，以及用于调节所述第一谐振频率的第二电容伙伴元件，所述至少第一谐振器 通过所述电信号调整分量（V调音）。
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公开(公告)号：US20050189998A1
公开(公告)日：2005-09-01
申请号：US11025775
申请日：2004-12-29
申请人： Andreia Cathelin , Didier Belot
发明人： Andreia Cathelin , Didier Belot
CPC分类号： H03L7/0805 , H03B5/366 , H03J3/185 , H03J3/20 , H03J3/22 , H03J3/24 , H03L5/00 , H03L7/00 , H03L7/099
摘要： A phase-locked loop that can be integrated into a semiconductor product comprises: a phase comparator having a first input, a second input and an output, said first input receiving a reference frequency; a low-pass filter having an input connected to said output of said phase comparator and having an output generating an electric control signal (Vtune); an oscillating circuit generating a predefined frequency signal to be controlled; a dividing block having an input receiving the oscillating signal and an output connected to said second input of said phase comparator. The oscillating circuit comprises a BAW-type acoustic resonator having first and second resonant frequencies and associated with a first inductive partner element to cancel out said second resonant frequency and with a second capacitive partner element for regulating said first resonant frequency, said at least first resonator component being adjusted via said electric signal (Vtune).
摘要翻译： 可以集成到半导体产品中的锁相环包括：具有第一输入，第二输入和输出的相位比较器，所述第一输入接收参考频率; 低通滤波器，具有连接到所述相位比较器的所述输出的输入端，并且具有产生电控制信号（V调谐）的输出; 产生要被控制的预定频率信号的振荡电路; 具有接收振荡信号的输入的分频块和连接到所述相位比较器的所述第二输入的输出。 振荡电路包括具有第一和第二谐振频率并与第一电感对象元件相关联以抵消所述第二谐振频率的BAW型声谐振器，以及用于调节所述第一谐振频率的第二电容伙伴元件，所述至少第一谐振器 通过所述电信号调整分量（V调音）。
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公开(公告)号：US08982994B2
公开(公告)日：2015-03-17
申请号：US13328412
申请日：2011-12-16
申请人： Mathieu Egot , Jonathan Muller , Andreia Cathelin , Didier Belot
发明人： Mathieu Egot , Jonathan Muller , Andreia Cathelin , Didier Belot
CPC分类号： H01Q3/26
摘要： Device comprising processing means (MT), transmission channels (VE1, . . . VEn), an antenna array for transmitting signals comprising a number of antennas (A11 . . . A1n) respectively associated with the transmission channels, a number of digital-analog converters (DAC) and a number of phase-shifting means (MD1, . . . MDn) respectively associated with the antennas, said phase-shifting means (MD1, . . . MDn) being placed between the processing means (MT) and the digital-analog converters (DAC) and including digital all-pass filters of FIR type (PT), the processing means comprising control means (MC) configured to adjust the coefficients and/or the order of the all-pass filters of FIR type.
摘要翻译： 包括处理装置（MT），传输信道（VE1，...，VEn）的装置，用于发送包括分别与传输信道相关联的多个天线（A11 ... A1n）的信号的天线阵列，数字模拟 分别与天线相关联的多个转换器（DAC）和多个移相装置（MD1，...，MDn），所述移相装置（MD1，...，MDn）被放置在处理装置（MT）和 数模转换器（DAC）并且包括FIR类型（PT）的数字全通滤波器，所述处理装置包括被配置为调整FIR类型的全通滤波器的系数和/或顺序的控制装置（MC）。
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公开(公告)号：US07187240B2
公开(公告)日：2007-03-06
申请号：US11025781
申请日：2004-12-29
CPC分类号： H03L7/0805 , H03B5/366 , H03H2009/02204 , H03J3/185 , H03J3/20 , H03J3/22 , H03J3/24 , H03L5/00 , H03L7/00 , H03L7/099
摘要： An integrated electronic circuit comprises at least first and second variable resonator elements that can be tuned by means of an electric signal (Vtune) and that are arranged on the same silicon substrate, and that are respectively integrated into a Master circuit and a Slave circuit. Each resonator element is associated with a first inductive partner element set in the vicinity of the resonant and antiresonant frequencies; and with a second capacitive partner element, at least one of said partner elements being adjustable by means of said electric signal (Vtune). Controlling both partner elements could be done either by means of an adjustable capacitor, as a varactor, or by means of an inductor, passive or active, fixed or variable.
摘要翻译： 集成电子电路包括至少第一和第二可变谐振器元件，其可以通过电信号（V调谐）进行调谐，并且被布置在相同的硅衬底上，并且分别集成到 主电路和从电路。 每个谐振器元件与在谐振和反谐振频率附近设置的第一感应对象元件相关联; 并且利用第二电容性伙伴元件，所述对方元件中的至少一个可通过所述电信号（V调谐）调节。 控制两个伙伴元素可以通过可调电容器，变容二极管或通过电感器，被动或主动，固定或可变的方式完成。
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6.发明申请Receiver for an integrated heterodyne communication system including BAW-type resonators 有权用于集成外差通信系统的接收机，包括BAW型谐振器公开(公告)号：US20050266823A1
公开(公告)日：2005-12-01
申请号：US11125291
申请日：2005-05-09
申请人： Andreia Cathelin , Didier Belot
发明人： Andreia Cathelin , Didier Belot
CPC分类号： H03H7/0169 , H03H9/74 , H04B1/28
摘要： A heterodyne receiving circuit for a digital communication system including a first band pass filter receiving a signal from an antenna, an amplifying circuit and a second narrow band pass filter for selecting one particular channel within a band of frequencies. The two filters are carried out with integrated BAW-type tunable resonators which can be adjusted, respectively, by a first electrical signal and a second electrical signal generated by two PLL-type frequency control loops. The second frequency control loop has a variable division factor for the purpose of selecting one particular channel within said band of frequencies. In addition, the receiving circuit includes a mixer for mixing the signal generated at the output of said second filter with a local oscillation frequency in order to produce an intermediate frequency. The division factor is controlled by a digital processing of the intermediate frequency.
摘要翻译： 一种用于数字通信系统的外差接收电路，包括接收来自天线的信号的第一带通滤波器，放大电路和用于选择频带内的一个特定信道的第二窄带通滤波器。 两个滤波器由集成的BAW型可调谐谐振器进行，分别可以通过由两个PLL型频率控制回路产生的第一电信号和第二电信号来调节。 第二频率控制回路具有可变分频因子，用于选择所述频带内的一个特定信道。 此外，接收电路包括用于将在所述第二滤波器的输出处产生的信号与本地振荡频率混合的混频器，以便产生中频。 分频因子由中频数字处理控制。
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公开(公告)号：US07868517B2
公开(公告)日：2011-01-11
申请号：US12255426
申请日：2008-10-21
申请人： Didier Belot , Andreia Cathelin , Alexandre Augusto Shirakawa , Jean-Marie Pham , Pierre Jary , Eric Kerherve
发明人： Didier Belot , Andreia Cathelin , Alexandre Augusto Shirakawa , Jean-Marie Pham , Pierre Jary , Eric Kerherve
IPC分类号： H01L41/04
CPC分类号： H03H9/17 , H03H9/02228
摘要： A Lamb wave resonator includes a piezoelectric layer, and a first electrode against a first face of the piezoelectric layer. The first electrode includes fingers and a contact arm, with each finger including a first side in contact with the contact arm and two other sides parallel to one another. Portions of the piezoelectric layer are at least partially etched between the two fingers to form a recess. The fingers are spaced apart from one another by a distance W calculated according to the following equation: W = n · va lateral f , with n ∈ N where, valateral is an acoustic propagation speed of Lamb waves, n is an order of a resonance mode of the Lamb waves, f is a resonance frequency of the Lamb wave resonator.
摘要翻译： 兰姆波谐振器包括压电层和抵靠压电层的第一面的第一电极。 第一电极包括指状物和接触臂，每个指状物包括与接触臂接触的第一侧和彼此平行的两个另外的边。 在两个手指之间至少部分蚀刻压电层的一部分以形成凹部。 手指按照以下等式计算的距离W彼此间隔开：W = n·va横向f，其中n n为N，其中，侧向是兰姆波的声传播速度，n是 Lamb波的谐振模式，f是兰姆波谐振器的谐振频率。
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公开(公告)号：US20050189999A1
公开(公告)日：2005-09-01
申请号：US11025781
申请日：2004-12-29
CPC分类号： H03L7/0805 , H03B5/366 , H03H2009/02204 , H03J3/185 , H03J3/20 , H03J3/22 , H03J3/24 , H03L5/00 , H03L7/00 , H03L7/099
摘要： An integrated electronic circuit comprises at least first and second variable resonator elements that can be tuned by means of an electric signal (Vtune) and that are arranged on the same silicon substrate, and that are respectively integrated into a Master circuit and a Slave circuit. Each resonator element is associated with a first inductive partner element set in the vicinity of the resonant and antiresonant frequencies; and with a second capacitive partner element, at least one of said partner elements being adjustable by means of said electric signal (Vtune). Controlling both partner elements could be done either by means of an adjustable capacitor, as a varactor, or by means of an inductor, passive or active, fixed or variable.
摘要翻译： 集成电子电路包括至少第一和第二可变谐振器元件，其可以通过电信号（V调谐）进行调谐，并且被布置在相同的硅衬底上，并且分别集成到 主电路和从电路。 每个谐振器元件与在谐振和反谐振频率附近设置的第一感应对象元件相关联; 并且利用第二电容性伙伴元件，所述对方元件中的至少一个可通过所述电信号（V调谐）调节。 控制两个伙伴元素可以通过可调电容器，变容二极管或通过电感器，被动或主动，固定或可变的方式完成。
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9.发明申请Electronic circuit comprising a resonator to be integrated into a semiconductor product 失效电子电路包括要被集成到半导体产品中的谐振器公开(公告)号：US20050174198A1
公开(公告)日：2005-08-11
申请号：US11024950
申请日：2004-12-29
CPC分类号： H03H11/486 , H03H11/50 , H03H2009/02204
摘要： An electronic circuit comprises a resonator meant to be integrated into a semiconductor product including a resonator having first and second resonant frequencies. The electronic circuit comprises: a first inductive partner element for canceling out said second resonant frequency, said partner element having a quality coefficient QI (f) having a first value in a predetermined frequency band and a second value outside said frequency band; a second capacitive partner element for adjusting tuning of said resonator to said first frequency.
摘要翻译： 一种电子电路包括一个谐振器，该谐振器被集成到包括具有第一和第二谐振频率的谐振器的半导体产品中。 电子电路包括：用于消除所述第二谐振频率的第一电感对象元件，所述伙伴元件具有在预定频带中具有第一值的质量系数QI（f）和在所述频带外的第二值; 第二电容伙伴元件，用于将所述谐振器的调谐调节到所述第一频率。
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公开(公告)号：US20120163425A1
公开(公告)日：2012-06-28
申请号：US13328412
申请日：2011-12-16
申请人： Mathieu Egot , Jonathan Muller , Andreia Cathelin , Didier Belot
发明人： Mathieu Egot , Jonathan Muller , Andreia Cathelin , Didier Belot
CPC分类号： H01Q3/26
摘要： Device comprising processing means (MT), transmission channels (VE1, . . . VEn), an antenna array for transmitting signals comprising a number of antennas (A11 . . . A1n) respectively associated with the transmission channels, a number of digital-analogue converters (DAC) and a number of phase-shifting means (MD1, . . . MDn) respectively associated with the antennas, said phase-shifting means (MD1, . . . MDn) being placed between the processing means (MT) and the digital-analogue converters (DAC) and including digital all-pass filters of FIR type (PT), the processing means comprising control means (MC) configured to adjust the coefficients and/or the order of the all-pass filters of FIR type.
摘要翻译： 包括处理装置（MT），传输信道（VE1，...，VEn）的装置，用于发送包括分别与传输信道相关联的多个天线（A11 ... A1n）的信号的天线阵列，数字模拟 分别与天线相关联的多个转换器（DAC）和多个移相装置（MD1，...，MDn），所述移相装置（MD1，...，MDn）被放置在处理装置（MT）和 数字模拟转换器（DAC）并且包括FIR类型（PT）的数字全通滤波器，所述处理装置包括被配置为调整FIR类型的全通滤波器的系数和/或顺序的控制装置（MC）。
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