公开(公告)号：US10424580B2

公开(公告)日：2019-09-24

申请号：US13996505

申请日：2011-12-23

申请人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Gopinath Bhimarasetti ,  Tahir Ghani ,  Seiyon Kim

发明人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Gopinath Bhimarasetti ,  Tahir Ghani ,  Seiyon Kim

IPC分类号： H01L29/775 ,  H01L21/02 ,  H01L27/088 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L29/16 ,  B82Y99/00

摘要： Semiconductor devices having modulated nanowire counts and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a plurality of nanowires disposed above a substrate and stacked in a first vertical plane with a first uppermost nanowire. A second semiconductor device has one or more nanowires disposed above the substrate and stacked in a second vertical plane with a second uppermost nanowire. The second semiconductor device includes one or more fewer nanowires than the first semiconductor device. The first and second uppermost nanowires are disposed in a same plane orthogonal to the first and second vertical planes.

公开(公告)号：US20130313513A1

公开(公告)日：2013-11-28

申请号：US13996505

申请日：2011-12-23

申请人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Gopinath Bhimarasetti ,  Tahir Ghani ,  Seiyon Kim

发明人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Gopinath Bhimarasetti ,  Tahir Ghani ,  Seiyon Kim

IPC分类号： H01L29/775 ,  H01L21/02 ,  H01L27/088

摘要： Semiconductor devices having modulated nanowire counts and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a plurality of nanowires disposed above a substrate and stacked in a first vertical plane with a first uppermost nanowire. A second semiconductor device has one or more nanowires disposed above the substrate and stacked in a second vertical plane with a second uppermost nanowire. The second semiconductor device includes one or more fewer nanowires than the first semiconductor device. The first and second uppermost nanowires are disposed in a same plane orthogonal to the first and second vertical planes.

摘要翻译： 描述了具有调制纳米线计数的半导体器件和形成这种器件的方法。 例如，半导体结构包括具有多个纳米线的第一半导体器件，该多个纳米线设置在衬底上并且堆叠在具有第一最上层纳米线的第一垂直平面中。 第二半导体器件具有设置在衬底上方的一个或多个纳米线并且堆叠在具有第二最上层纳米线的第二垂直平面中。 第二半导体器件包括比第一半导体器件少的一个或多个纳米线。 第一和第二最上层的纳米线设置在与第一和第二垂直平面正交的同一平面中。

公开(公告)号：US09583491B2

公开(公告)日：2017-02-28

申请号：US14948083

申请日：2015-11-20

申请人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

发明人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L27/12 ,  H01L29/06 ,  B82Y10/00 ,  H01L29/66 ,  H01L29/775 ,  H01L21/84 ,  H01L29/423 ,  H01L29/10

CPC分类号： H01L21/823821 ,  B82Y10/00 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/84 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/12 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7853

摘要： Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.

摘要翻译： 描述了免费的金属氧化物半导体纳米线结构。 例如，半导体结构包括第一半导体器件。 第一半导体器件包括设置在衬底之上的第一纳米线。 第一纳米线具有在衬底上方的第一距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一栅极电极堆叠完全包围第一纳米线的离散通道区域。 半导体结构还包括第二半导体器件。 第二半导体器件包括设置在衬底上方的第二纳米线。 第二纳米线在衬底上方具有第二距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一距离与第二距离不同。 第二栅极电极堆叠完全围绕第二纳米线的离散通道区域。

公开(公告)号：US20160086951A1

公开(公告)日：2016-03-24

申请号：US14948083

申请日：2015-11-20

申请人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

发明人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/06 ,  H01L29/10

CPC分类号： H01L21/823821 ,  B82Y10/00 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/84 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/12 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7853

摘要： Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.

摘要翻译： 描述了免费的金属氧化物半导体纳米线结构。 例如，半导体结构包括第一半导体器件。 第一半导体器件包括设置在衬底之上的第一纳米线。 第一纳米线具有在衬底上方的第一距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一栅极电极堆叠完全包围第一纳米线的离散通道区域。 半导体结构还包括第二半导体器件。 第二半导体器件包括设置在衬底上方的第二纳米线。 第二纳米线在衬底上方具有第二距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一距离与第二距离不同。 第二栅极电极堆叠完全围绕第二纳米线的离散通道区域。

公开(公告)号：US09608059B2

公开(公告)日：2017-03-28

申请号：US13995418

申请日：2011-12-20

申请人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

发明人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L29/775 ,  H01L27/12 ,  B82Y10/00

CPC分类号： H01L29/66818 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/76216 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between the semiconductor body and the semiconductor substrate. A gate electrode stack at least partially surrounds a portion of the channel region of the semiconductor body.

公开(公告)号：US09224810B2

公开(公告)日：2015-12-29

申请号：US13996503

申请日：2011-12-23

申请人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

发明人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

IPC分类号： H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/12 ,  B82Y10/00 ,  H01L29/66 ,  H01L29/775

CPC分类号： H01L21/823821 ,  B82Y10/00 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/84 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/12 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7853

摘要： Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.

摘要翻译： 描述了免费的金属氧化物半导体纳米线结构。 例如，半导体结构包括第一半导体器件。 第一半导体器件包括设置在衬底之上的第一纳米线。 第一纳米线具有在衬底上方的第一距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一栅极电极堆叠完全包围第一纳米线的离散通道区域。 半导体结构还包括第二半导体器件。 第二半导体器件包括设置在衬底上方的第二纳米线。 第二纳米线在衬底上方具有第二距离的中点，并且在离散通道区域的任一侧上包括离散通道区域和源极和漏极区域。 第一距离与第二距离不同。 第二栅极电极堆叠完全围绕第二纳米线的离散通道区域。

公开(公告)号：US20140197377A1

公开(公告)日：2014-07-17

申请号：US13996503

申请日：2011-12-23

申请人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

发明人： Seiyon Kim ,  Kelin J. Kuhn ,  Tahir Ghani ,  Anand S. Murthy ,  Annalisa Cappellani ,  Stephen M. Cea ,  Rafael Rios ,  Glenn A. Glass

IPC分类号： H01L29/06 ,  H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823821 ,  B82Y10/00 ,  H01L21/8238 ,  H01L21/823807 ,  H01L21/823828 ,  H01L21/84 ,  H01L21/845 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/12 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/7853

摘要： Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.

摘要翻译： 描述了免费的金属氧化物半导体纳米线结构。 例如，半导体结构包括第一半导体器件。 第一半导体器件包括设置在衬底之上的第一纳米线。 第一纳米线具有在衬底上方的第一距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一栅极电极堆叠完全包围第一纳米线的离散通道区域。 半导体结构还包括第二半导体器件。 第二半导体器件包括设置在衬底上方的第二纳米线。 第二纳米线在衬底上方具有第二距离的中点，并且包括在离散通道区域的任一侧上的离散沟道区域和源极和漏极区域。 第一距离与第二距离不同。 第二栅极电极堆叠完全围绕第二纳米线的离散通道区域。

公开(公告)号：US20130320455A1

公开(公告)日：2013-12-05

申请号：US13995418

申请日：2011-12-20

申请人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

发明人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L29/66818 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/76216 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between the semiconductor body and the semiconductor substrate. A gate electrode stack at least partially surrounds a portion of the channel region of the semiconductor body.

摘要翻译： 描述具有隔离主体部分的半导体器件。 例如，半导体结构包括设置在半导体衬底之上的半导体本体。 半导体主体包括沟道区和沟道区两侧的一对源极和漏极区。 隔离基座设置在半导体本体和半导体衬底之间。 栅极电极堆叠至少部分地围绕半导体主体的沟道区域的一部分。

公开(公告)号：US09029221B2

公开(公告)日：2015-05-12

申请号：US13995467

申请日：2011-12-21

申请人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Aura Cecilia Davila Latorre ,  Tahir Ghani

发明人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Aura Cecilia Davila Latorre ,  Tahir Ghani

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/088 ,  H01L27/12 ,  H01L21/308

CPC分类号： H01L29/7831 ,  H01L21/3083 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/66484

摘要： Semiconductor devices having three-dimensional bodies with modulated heights and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a first semiconductor body disposed above a substrate. The first semiconductor body has a first height and an uppermost surface with a first horizontal plane. The semiconductor structure also includes a second semiconductor device having a second semiconductor body disposed above the substrate. The second semiconductor body has a second height and an uppermost surface with a second horizontal plane. The first and second horizontal planes are co-planar and the first and second heights are different.

摘要翻译： 描述具有调制高度的三维体的半导体器件和形成这种器件的方法。 例如，半导体结构包括具有设置在基板上方的第一半导体本体的第一半导体器件。 第一半导体本体具有第一高度和具有第一水平面的最上表面。 半导体结构还包括具有设置在衬底上方的第二半导体本体的第二半导体器件。 第二半导体本体具有第二高度和具有第二水平面的最上表面。 第一和第二水平面是共面的，第一和第二高度是不同的。

公开(公告)号：US20130320448A1

公开(公告)日：2013-12-05

申请号：US13995467

申请日：2011-12-21

申请人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Aura Cecilia Davila Latorre ,  Tahir Ghani

发明人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Aura Cecilia Davila Latorre ,  Tahir Ghani

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/7831 ,  H01L21/3083 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/66484

摘要： Semiconductor devices having three-dimensional bodies with modulated heights and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a first semiconductor body disposed above a substrate. The first semiconductor body has a first height and an uppermost surface with a first horizontal plane. The semiconductor structure also includes a second semiconductor device having a second semiconductor body disposed above the substrate. The second semiconductor body has a second height and an uppermost surface with a second horizontal plane. The first and second horizontal planes are co-planar and the first and second heights are different.

摘要翻译： 描述具有调制高度的三维体的半导体器件和形成这种器件的方法。 例如，半导体结构包括具有设置在基板上方的第一半导体本体的第一半导体器件。 第一半导体本体具有第一高度和具有第一水平面的最上表面。 半导体结构还包括具有设置在衬底上方的第二半导体本体的第二半导体器件。 第二半导体本体具有第二高度和具有第二水平面的最上表面。 第一和第二水平面是共面的，第一和第二高度是不同的。