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1.发明授权
公开(公告)号：US5569626A
公开(公告)日：1996-10-29
申请号：US234307
申请日：1994-04-28
IPC分类号： H01L31/0232 , H01L31/028 , H01L21/306
CPC分类号： H01L31/0232 , H01L31/028 , Y02E10/547 , Y10S438/96 , Y10T29/42
摘要： Piezo-optical pressure sensitive devices employing porous semiconductor material as a stress sensitive member. The devices monitor pressure or force applied thereto by detecting a corresponding change in the amount of light absorbed by a porous layer of semiconductive material such as silicon. A pressure or stress signal is thus converted into an optical one. The sensing element of an optical switch embodiment of the device is comprised of a transparent layer of material upon which there is disposed a porous layer of semiconductive material. When unstressed, the porous layer absorbs monochromatic light of a predetermined wavelength. When the porous layer is stressed, a metallized epitaxial layer formed thereon reflects the light back through the transparent layer where it can be detected by a light detection system.
摘要翻译： 使用多孔半导体材料作为应力敏感元件的压电光敏器件。 该装置通过检测由诸如硅的半导体材料的多孔层吸收的光量的相应变化来监测施加到其上的压力或力。 因此，压力或应力信号被转换为光学信号。 装置的光学开关实施例的感测元件由透明的材料层组成，其上设置有多孔半导体材料层。 当不受应力时，多孔层吸收预定波长的单色光。 当多孔层受到应力时，形成在其上的金属化外延层通过透明层反射光，其中它可被光检测系统检测。
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2.发明授权Semiconductor structures having environmentally isolated elements and method for making the same 失效具有环境隔离元件的半导体结构及其制造方法
公开(公告)号：US5386142A
公开(公告)日：1995-01-31
申请号：US58016
申请日：1993-05-07
CPC分类号： G01L9/0055 , G01L9/0042 , Y10S148/012 , Y10S438/96
摘要： A first semiconductor wafer having a semiconductor element such as a piezoresistive element or any integrated circuit located on a top surface thereof is bonded to a second semiconductor wafer so that the semiconductor element on the first wafer is received in a cavity sealed from the outside environment. The bottom surface of the second water is prepared by etching it about a mask pattern so that the pattern projects from the bottom surface, thereby forming the cavity and defining projecting surfaces which are bonded to corresponding projecting areas on the first wafer to create a hermetic seal therebetween. The second wafer is electrochemically etched to produce porous silicon with regions of non-porous monocrystalline silicon extending between the top and bottom surfaces. The porous areas are thermally oxidized to convert them to silicon dioxide while the non-porous regions bonded to bond pads of the resistive pattern on the first wafer act as extended contacts.
摘要翻译： 具有诸如压阻元件的半导体元件或位于其顶表面上的任何集成电路的第一半导体晶片被接合到第二半导体晶片，使得第一晶片上的半导体元件被接收在与外部环境密封的空腔中。 第二水的底表面通过围绕掩模图案进行蚀刻来制备，使得图案从底表面突出，从而形成空腔并且限定突出表面，其结合到第一晶片上的相应突出区域以形成气密封 之间。 第二晶片被电化学蚀刻以产生具有在顶表面和底表面之间延伸的非多孔单晶硅区域的多孔硅。 多孔区域被热氧化以将其转化为二氧化硅，而与第一晶片上的电阻图案的接合焊盘键合的非多孔区域作为延伸的触点。
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公开(公告)号：US5597738A
公开(公告)日：1997-01-28
申请号：US400139
申请日：1995-03-06
IPC分类号： H01L21/762 , H01L21/764 , H01L21/265
CPC分类号： H01L21/764 , H01L21/76264 , H01L21/76289 , Y10S148/15 , Y10S148/152
摘要： A method for fabricating a single crystal silicon on insulator material by forming oxidized layers underneath epi islands without damaging the surface quality of the silicon. In an illustrative embodiment, an epitaxial layer of p-type silicon is grown on a substrate of n-type silicon. A plurality of islands are defined from the epitaxial layer. A semiconductor device is fabricated from one of the p-islands by electrochemically anodizing a region of the substrate beneath that p-island, which p-island can be used to fabricate a selected semiconductor device. If n-type material is required for device fabrication, a device layer of n-type silicon can be grown on the surface of a p-islands and that p-island can be anodized and oxidized to form the insulating layer between the device layer and substrate. In this manner, MOS transistors and other devices may be fabricated for operation at temperatures of up to 500.degree. C.
摘要翻译： 一种通过在epi岛下形成氧化层而制造单晶硅绝缘体材料的方法，而不损害硅的表面质量。 在说明性实施例中，在n型硅的衬底上生长p型硅的外延层。 从外延层限定多个岛。 半导体器件由一个p岛制造，通过电化学阳极化在该p岛下面的衬底的区域，该p岛可用于制造选定的半导体器件。 如果器件制造需要n型材料，则可以在p岛的表面上生长n型硅的器件层，并且可以对p岛进行阳极氧化和氧化，以在器件层与器件层之间形成绝缘层 基质。 以这种方式，可以制造MOS晶体管和其它器件用于在高达500℃的温度下操作。
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4.发明授权Method for making semiconductor structures having environmentally isolated elements 失效制造具有环境隔离元件的半导体结构的方法
公开(公告)号：US5461001A
公开(公告)日：1995-10-24
申请号：US252447
申请日：1994-06-01
CPC分类号： G01L9/0055 , G01L9/0042 , Y10S148/012 , Y10S438/96
摘要： A first semiconductor wafer having a semiconductor element such as a piezoresistive element or any integrated circuit located on a top surface thereof is bonded to a second semiconductor wafer so that the semiconductor element on the first wafer is received in a cavity sealed from the outside environment. The bottom surface of the second wafer is prepared by etching it about a mask pattern so that the pattern projects from the bottom surface, thereby forming the cavity and defining projecting surfaces which are bonded to corresponding projecting areas on the first wafer to create a hermetic seal therebetween. The second wafer is electrochemically etched to produce porous silicon with regions of non-porous monocrystalline silicon extending between the top and bottom surfaces. The porous areas are thermally oxidized to convert them to silicon dioxide while the non-porous regions bonded to bond pads of the resistive pattern on the first wafer act as extended contacts.
摘要翻译： 具有诸如压阻元件的半导体元件或位于其顶表面上的任何集成电路的第一半导体晶片被接合到第二半导体晶片，使得第一晶片上的半导体元件被接收在与外部环境密封的空腔中。 第二晶片的底表面通过围绕掩模图案进行蚀刻来制备，使得图案从底表面突出，从而形成空腔并且限定突出表面，其接合到第一晶片上的对应突出区域以产生气密封 之间。 第二晶片被电化学蚀刻以产生具有在顶表面和底表面之间延伸的非多孔单晶硅区域的多孔硅。 多孔区域被热氧化以将其转化为二氧化硅，而与第一晶片上的电阻图案的接合焊盘键合的非多孔区域作为延伸的触点。
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公开(公告)号：US5359214A
公开(公告)日：1994-10-25
申请号：US71669
申请日：1993-06-02
IPC分类号： H01L21/337 , H01L29/10 , H01L29/423 , H01L29/808 , H01L29/80 , H01L29/06
CPC分类号： H01L29/66901 , H01L29/1066 , H01L29/42316 , H01L29/808
摘要： A field effect transistor device constructed in accordance with the present invention includes a channel of semiconductive material such as silicon having at least one row of pores extending therethrough. Internal pn junctions are fabricated within the porous region, such that the inside of each pore is coated with a layer of opposite conductivity type semiconductive material. When voltage is applied to the internal pn-junctions, the space charge around the pores widens or contracts, depending upon the direction of the bias, thereby permitting the modulation of current flow through the channel.
摘要翻译： 根据本发明构造的场效应晶体管器件包括半导体材料的通道，诸如具有延伸穿过其中的至少一排孔的硅。 在多孔区域内制造内部pn结，使得每个孔的内部涂覆有相反导电型半导体材料的层。 当电压施加到内部pn结时，根据偏压的方向，孔周围的空间电荷变宽或收缩，从而允许调节流过通道的电流。
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公开(公告)号：US5387803A
公开(公告)日：1995-02-07
申请号：US78392
申请日：1993-06-16
IPC分类号： H01L31/0232 , H01L31/028 , H01L29/84
CPC分类号： H01L31/0232 , H01L31/028 , Y02E10/547 , Y10S438/96 , Y10T29/42
摘要： Piezo-optical pressure sensitive devices employing porous semiconductor material as a stress sensitive member. The devices monitor pressure or force applied thereto by detecting a corresponding change in the amount of light absorbed by a porous layer of semiconductive material such as silicon. A pressure or stress signal is thus converted into an optical one. The sensing element of an optical switch embodiment of the device is comprised of a transparent layer of material upon which there is disposed a porous layer of semiconductive material. When unstressed, the porous layer absorbs monochromatic light of a predetermined wavelength. When the porous layer is stressed, a metallized epitaxial layer formed thereon reflects the light back through the transparent layer where it can be detected by a light detection system.
摘要翻译： 使用多孔半导体材料作为应力敏感元件的压电光敏器件。 该装置通过检测由诸如硅的半导体材料的多孔层吸收的光量的相应变化来监测施加到其上的压力或力。 因此，压力或应力信号被转换为光学信号。 装置的光学开关实施例的感测元件由透明的材料层组成，其上设置有多孔半导体材料层。 当不受应力时，多孔层吸收预定波长的单色光。 当多孔层受到应力时，形成在其上的金属化外延层通过透明层反射光，其中它可被光检测系统检测。
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公开(公告)号：US08578782B2
公开(公告)日：2013-11-12
申请号：US13253139
申请日：2011-10-05
摘要： A system for measuring a multiplicity of pressures as those experienced by a model in a wind tunnel is depicted. The system includes individual sensor devices which are connected to an electronics module. The sensors may be connected to the electronics module via a cable in a first embodiment. In an alternate embodiment, the sensors may be connected to the electronics module via a mating connector located therebetween. A memory component which stores compensation coefficients associated with each of the sensors may also be included in the system to correct errors associated with each sensor. The advantage of the various embodiments is that each sensor does not have any compensation stored thereon and thus, the sensors can be made very small to operate at very high temperatures without any loss of accuracy.
摘要翻译： 描绘了一种用于测量如风洞中的模型所经历的多种压力的系统。 该系统包括连接到电子模块的各个传感器装置。 在第一实施例中，传感器可以经由电缆连接到电子模块。 在替代实施例中，传感器可以经由位于其间的匹配连接器连接到电子模块。 存储与每个传感器相关联的补偿系数的存储器组件也可以被包括在系统中以校正与每个传感器相关联的错误。 各种实施例的优点是每个传感器不存在其上的任何补偿，因此，可以使传感器非常小以在非常高的温度下操作而没有任何精度的损失。
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公开(公告)号：US20120048024A1
公开(公告)日：2012-03-01
申请号：US13291578
申请日：2011-11-08
IPC分类号： G01L9/00
CPC分类号： G01L1/18 , G01L19/003 , G01M9/06
摘要： A novel flexible transducer structure is suitable for attaching to curved surface such as the leading edge of an aircraft wing. The structure comprises a thin flexible sheet of an insulating material with a leadless transducer secured to the sheet. The sheet is then placed over the curved surface and assumes the curvature of the surface. The transducer secured to the sheet provides an output of pressure according the pressure exerted on the sheet. The sheet basically is fabricated from a thin material such as Kapton and is flexible so as to assume the curvature of the surface with the transducer being exposed to pressure applied to the curved surface. The sensor in conjunction with the flexible sheet allows pressure to be measured without disturbing the air flow patterns of the measuring surfaces and because of its construction, is moisture resistant over a large variety of atmospheric conditions.
摘要翻译： 一种新颖的柔性换能器结构适用于连接到诸如飞机机翼前缘的弯曲表面。 该结构包括具有固定到片材上的无引导换能器的绝缘材料的薄柔性片。 然后将片材放置在弯曲表面上并呈现表面的曲率。 固定到片材上的传感器根据施加在片材上的压力提供压力输出。 片材基本上由诸如Kapton的薄材料制成，并且是柔性的，以便呈现表面的曲率，其中换能器暴露于施加到弯曲表面的压力。 传感器与柔性片材相结合，允许测量压力，而不会干扰测量表面的气流图案，并且由于其结构，在各种大气条件下都是防潮的。
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9.发明申请公开(公告)号：US20100107773A1
公开(公告)日：2010-05-06
申请号：US12686990
申请日：2010-01-13
申请人： Anthony D. Kurtz , Alexander A. Ned
发明人： Anthony D. Kurtz , Alexander A. Ned
CPC分类号： G01L1/18 , C03C27/044 , G01L1/2287 , G01L9/0042 , G01L9/0054 , G01L19/0069 , G01L19/0084 , Y10T156/10
摘要： A piezoresistive sensor device and a method for making a piezoresistive device are disclosed. The sensor device comprises a silicon wafer having piezoresistive elements and contacts in electrical communication with the elements. The sensor device further comprises a contact glass coupled to the silicon wafer and having apertures aligned with the contacts. The sensor device also comprises a non-conductive frit for mounting the contact glass to a header glass, and a conductive non-lead glass frit disposed in the apertures and in electrical communication with the contacts. The method for making a piezoresistive sensor device, comprises bonding a contact glass to a silicon wafer such that apertures in the glass line up with contacts on the wafer, and filling the apertures with a non-lead glass frit such that the frit is in electrical communication with the contacts. The use of a lead free glass frit prevents catastrophic failure of the piezoresistive sensor and associated transducer in ultra high temperature applications.
摘要翻译： 公开了压阻传感器装置和制造压阻器件的方法。 传感器装置包括具有压阻元件和与元件电连通的触点的硅晶片。 所述传感器装置还包括接触玻璃，所述接触玻璃联接到所述硅晶片并且具有与所述触点对准的孔。 传感器装置还包括用于将接触玻璃安装到集管玻璃的非导电玻璃料，以及设置在孔中并与触头电连通的导电非铅玻璃料。 用于制造压阻传感器装置的方法包括将接触玻璃接合到硅晶片，使得玻璃中的孔与晶片上的触点对齐，并用非铅玻璃料填充孔，使得玻璃料处于电 与联系人沟通。 使用无铅玻璃料防止压敏传感器和相关传感器在超高温应用中的灾难性故障。
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公开(公告)号：US07451655B2
公开(公告)日：2008-11-18
申请号：US11709639
申请日：2007-02-22
IPC分类号： G01L9/06
CPC分类号： G01L9/065
摘要： A high temperature pressure sensing system (transducer) including: a pressure sensing piezoresistive sensor formed by a silicon-on-insulator (SOI) process; a SOI amplifier circuit operatively coupled to the piezoresistive sensor; a SOI gain controller circuit including a plurality of resistances that when selectively coupled to the amplifier adjust a gain of the amplifier; a plurality of off-chip contacts corresponding to the resistances, respectively, for electrically activating the corresponding resistances and using a metallization layer for the SOI sensor and SOI ASIC suitable for high temperature interconnections (bonding); wherein the piezoresistive sensor, amplifier circuit and gain control circuit are suitable for use in environments having a temperature greater than 175 degrees C. and reaching between 250° C. and 300° C., and wherein the entire transducer has a high immunity to nuclear radiation.
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