利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

34 条记录 (耗时 0.031 秒)

    Structure and method for providing gate leakage isolation locally within analog circuits
    5.
    发明授权
    Structure and method for providing gate leakage isolation locally within analog circuits 失效
    在模拟电路中局部提供栅极泄漏隔离的结构和方法

    公开(公告)号：US07268632B2

    公开(公告)日：2007-09-11

    申请号：US11163013

    申请日：2005-09-30

    申请人： Anthony R. Bonaccio ,  Hayden C. Cranford, Jr. ,  Joseph A. Iadanza ,  Stephen D. Wyatt

    发明人： Anthony R. Bonaccio ,  Hayden C. Cranford, Jr. ,  Joseph A. Iadanza ,  Stephen D. Wyatt

    IPC分类号： H03L7/00 ,  H03L7/099 ,  H03B5/18

    CPC分类号： H03L7/093 ,  H03L7/0891

    摘要： A loop filter for a phase-locked-loop is provided, comprising a set of capacitor banks coupled in parallel to form the loop filter, and a detection circuit for identifying and isolating defective capacitor banks. A method for providing a loop filter for a phase-locked-loop in accordance with an embodiment of the present invention includes the steps of forming the loop filter using a set of capacitor banks coupled in parallel, detecting any defective capacitor banks in the set of capacitor banks, isolating each defective capacitor bank, providing a set of redundant capacitor banks, and replacing each defective capacitor bank with a redundant capacitor bank from the set of redundant capacitor banks.

    摘要翻译： 提供了一种用于锁相环的环路滤波器，包括并联耦合以形成环路滤波器的一组电容器组，以及用于识别和隔离有缺陷的电容器组的检测电路。 根据本发明实施例的用于提供用于锁相环的环路滤波器的方法包括以下步骤：使用并联耦合的一组电容器组形成环路滤波器，检测该组中的任何有缺陷的电容器组 电容器组，隔离每个有缺陷的电容器组，提供一组冗余电容器组，并从冗余电容器组组中的冗余电容器组替换每个有缺陷的电容器组。

    Damping of LC ringing in IC (integrated circuit) power distribution systems
    7.
    发明授权
    Damping of LC ringing in IC (integrated circuit) power distribution systems 失效
    IC（集成电路）配电系统中LC振荡的阻尼

    公开(公告)号：US06963240B2

    公开(公告)日：2005-11-08

    申请号：US10707171

    申请日：2003-11-25

    申请人： Anthony R. Bonaccio ,  Allen P. Haar ,  Michael A. Sorna ,  Ivan L. Wemple ,  Stephen D. Wyatt

    发明人： Anthony R. Bonaccio ,  Allen P. Haar ,  Michael A. Sorna ,  Ivan L. Wemple ,  Stephen D. Wyatt

    IPC分类号： G05F1/10 ,  G05F3/02 ,  H03K17/16 ,  H03L5/00

    CPC分类号： G11C5/14 ,  H01L23/50 ,  H01L2924/0002 ,  H03K17/164 ,  H01L2924/00

    摘要： A structure and method for damping LC (inductance-capacitance) ringing in integrated circuit (IC) power distribution systems. The structure comprises a resistance electrically connected in parallel with a plurality of electrical switches. The resistance and electrical switches are electrically connected in series with the package and on-chip power distribution circuit. When on-chip switching activity creates a sudden and appreciable change in IC power demand the electrical switches are opened to temporarily increase the resistance in series with the power supply. This serves to dampen the power-distribution LC ringing. Later, the electrical switches are closed to shunt the series resistance and reduce the level of steady-state voltage drop in the power structure.

    摘要翻译： 用于阻尼集成电路（IC）配电系统中LC（电感 - 电容）振铃的结构和方法。 该结构包括与多个电开关并联电连接的电阻。 电阻和电气开关与封装和片上配电电路串联电连接。 当片上切换活动产生IC功率需求的突然和明显的变化时，电开关被打开以临时增加与电源串联的电阻。 这用于抑制功率分配LC振铃。 之后，电开关闭合以分流串联电阻并降低电源结构中稳态电压降的水平。

    System and method for control parameter re-centering in a controlled phase lock loop system
    9.
    发明授权
    System and method for control parameter re-centering in a controlled phase lock loop system 有权
    控制参数重心在控制锁相环系统中的系统和方法

    公开(公告)号：US06882230B2

    公开(公告)日：2005-04-19

    申请号：US10604095

    申请日：2003-06-26

    申请人： Joseph A. Iadanza ,  Ram Kelkar ,  Stephen D. Wyatt

    发明人： Joseph A. Iadanza ,  Ram Kelkar ,  Stephen D. Wyatt

    IPC分类号： H03L7/18 ,  H03L7/00

    CPC分类号： H03L7/18 ,  H03L2207/06

    摘要： A re-centering system (116) for re-centering the control parameter of a phase lock loop (PLL) (112). The re-centering system includes sources (140) for obtaining/storing operating parameters, such as environmental data (184), setup data (188), and other knowns data (192). At least one state machine (132) utilizes the operating parameters to adjust the topology of the PLL so as to achieve a desirable topology for each target output frequency (18) that substantially centers the performance envelope(s) (120, 124, 128) to a desired pre-selected value of the control parameter. The re-centering system also includes a comparator (136) for comparing measured values of the control parameter to a pre-selected value. The state machine utilizes the output of the comparator to substantially center the corresponding performance envelope at the pre-selected value.

    摘要翻译： 一种用于重新定心锁相环（PLL）（112）的控制参数的重定心系统（116）。 再定心系统包括用于获取/存储诸如环境数据（184），建立数据（188）和其他已知数据（192）的操作参数的源（140）。 至少一个状态机（132）利用操作参数来调整PLL的拓扑结构，以便实现基本上使性能包络（120,124,128）中心的每个目标输出频率（18）的理想拓扑， 到控制参数的期望的预选值。 重新定心系统还包括比较器（136），用于将控制参数的测量值与预选值进行比较。 状态机利用比较器的输出使相应的性能包络大致居中在预先选定的值。

    High output resistance, wide swing charge pump
    10.
    发明授权
    High output resistance, wide swing charge pump 失效
    高输出电阻，宽摆电荷泵

    公开(公告)号：US07583116B2

    公开(公告)日：2009-09-01

    申请号：US11833500

    申请日：2007-08-03

    申请人： Stephen D. Wyatt ,  Tian Xia

    发明人： Stephen D. Wyatt ,  Tian Xia

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0896 ,  H02M3/07 ,  H03L7/18

    摘要： Disclosed are current sink and source circuits, a charge pump that incorporates them, and a phase locked loop that incorporates the charge pump. The current sink and source circuits each have a current mirror that biases a transistor connected to an output node. These circuits each further have a two-stage feedback amplifier to sense the current mirror drain voltage and to control the transistor gate voltage in order to stabilize the current mirror drain voltage independent of output voltage at the output node. The amplifier also increases output resistance at the output node. This configuration allows for a wide operation voltage range and ensures good circuit performance under a very low power supply. A charge pump that incorporates these circuits generates highly matched charging and discharging currents. A PLL that incorporates this charge pump exhibits minimal bandwidth shifts and minimal locking speed and jitter performance degradation.

    摘要翻译： 公开了当前的电流源和源极电路，它们组合的电荷泵以及结合电荷泵的锁相环。 电流源和电源电路各自具有偏置连接到输出节点的晶体管的电流镜。 这些电路还具有两级反馈放大器以感测电流镜漏极电压并控制晶体管栅极电压，以便稳定电流镜漏极电压，而与输出节点处的输出电压无关。 放大器还增加输出节点的输出电阻。 该配置允许宽的工作电压范围，并在非常低的电源下确保良好的电路性能。 集成这些电路的电荷泵产生高度匹配的充电和放电电流。 集成该电荷泵的PLL具有最小的带宽偏移和最小的锁定速度和抖动性能下降。