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公开(公告)号:US20250094564A1
公开(公告)日:2025-03-20
申请号:US18790765
申请日:2024-07-31
Applicant: Apple Inc.
Inventor: Peter A. Lisherness , Assaf Menachem , Assaf Metuki , Benjamin Biron , D J Capelis , Husam Khashiboun , Jacques Fortier
Abstract: Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes a sensor and sensor processor circuitry coupled to the sensor. The sensor processor circuitry is configured to process sensor data received from a sensor of the computing device. In response to a first indication that a first consumer is trustworthy, the sensor processor circuitry is configured to provide a first data set of the processed sensor data to the first consumer. In response to a second indication that a second consumer is untrustworthy, the sensor processor circuitry is configured to negotiate one or more conditions in which the second consumer is permitted to receive a second data set of the processed sensor data.
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公开(公告)号:US20240428750A1
公开(公告)日:2024-12-26
申请号:US18827349
申请日:2024-09-06
Applicant: Apple Inc.
Inventor: Assaf Menachem
Abstract: An electronic device may include a first display pipeline that may output image data via an output path. The electronic device may include first frame merge circuitry coupled to the output path. The electronic device may also include a first multiplexer coupled to the first frame merge circuitry and to the output path. The first multiplexer may transmit the image data from the output path to an electronic display, and, in response to a first control signal associated with the first frame merge circuitry generating a merged output, the first multiplexer transmits the merged output to the electronic display.
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公开(公告)号:US12087252B2
公开(公告)日:2024-09-10
申请号:US18143353
申请日:2023-05-04
Applicant: Apple Inc.
Inventor: Assaf Menachem
CPC classification number: G09G5/14 , G06T1/20 , G09G5/12 , G09G5/377 , G09G2300/026 , G09G2320/08 , G09G2340/10 , G09G2370/20
Abstract: An electronic device may include a first display pipeline that may output image data via an output path. The electronic device may include first frame merge circuitry coupled to the output path. The electronic device may also include a first multiplexer coupled to the first frame merge circuitry and to the output path. The first multiplexer may transmit the image data from the output path to an electronic display, and, in response to a first control signal associated with the first frame merge circuitry generating a merged output, the first multiplexer transmits the merged output to the electronic display.
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公开(公告)号:US20220084477A1
公开(公告)日:2022-03-17
申请号:US17357868
申请日:2021-06-24
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Assaf Menachem , Daniel Yechiel Dar , Ido Yaacov Soffair
Abstract: An electronic display device has a panel that operates in conjunction with a light-emitting diode (LED) backlight. The device “slopes” or gradually ramps a change in brightness of an LED based on a target brightness value of the LED, a current brightness value of the LED, and temperature at the LED. The device also may limit power to the backlight based on an estimated power consumption of a current row of LEDs of the backlight and power consumption of the other rows of LEDs. The device also may determine a reduced voltage to supply to an LED based on a current to supply to the LED to cause the LED to operate. The device also may send an interrupt to the backlight to block updates to the backlight while image content is written to pixels of the panel. The device further compensates for aging of and temperature at an LED.
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公开(公告)号:US20250094565A1
公开(公告)日:2025-03-20
申请号:US18790895
申请日:2024-07-31
Applicant: Apple Inc.
Inventor: Peter A. Lisherness , Assaf Menachem , Assaf Metuki , Benjamin Biron , D J Capelis , Husam Khashiboun , Jacques Fortier
Abstract: Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes user interface and user interface pipeline circuitry coupled to the user interface. The user interface pipeline circuitry is configured to process a set of data received from a first source to produce an output for the user interface of the computing device, receive, from a second source, an indication that a component of the computing device has been activated, and, prior to presenting the output via the user interface, insert, into the output, an indicator of the component being activated.
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公开(公告)号:US11842700B2
公开(公告)日:2023-12-12
申请号:US18109691
申请日:2023-02-14
Applicant: Apple Inc.
Inventor: Prabhu Rajamani , Liang Deng , Oren Kerem , Meir Harar , Ido Yaacov Soffair , Assaf Menachem , John H. Kelm , Rohit K. Gupta
IPC: G09G3/34
CPC classification number: G09G3/3426 , G09G2320/0233 , G09G2320/0646 , G09G2330/021 , G09G2360/18
Abstract: Throttling circuitry may throttle the backlight reconstruction via backlight reconstruction and compensation circuitry in a display pipeline when power may be limited. This throttling of the display pipeline may limit a number of cycles that may be used for performing backlight reconstruction and compensation.
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公开(公告)号:US20220343878A1
公开(公告)日:2022-10-27
申请号:US17466865
申请日:2021-09-03
Applicant: Apple Inc.
Inventor: Assaf Menachem
Abstract: An electronic device may include a first display pipeline that may output image data via an output path. The electronic device may include first frame merge circuitry coupled to the output path. The electronic device may also include a first multiplexer coupled to the first frame merge circuitry and to the output path. The first multiplexer may transmit the image data from the output path to an electronic display, and, in response to a first control signal associated with the first frame merge circuitry generating a merged output, the first multiplexer transmits the merged output to the electronic display.
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公开(公告)号:US20190341007A1
公开(公告)日:2019-11-07
申请号:US15969539
申请日:2018-05-02
Applicant: Apple Inc.
Inventor: Peter F. Holland , Mahesh B. Chappalli , Assaf Menachem
Abstract: An electronic device may include a display panel and an image data source designed to determine a differing region in the image frame by comparing source image data and image data corresponding with a previous image frame. The electronic device may also include a display pipeline between the image data source and the display panel. The display pipeline may include image processing circuitry to convert image data from a source space to a display space and image processing circuitry to spatially process the image data. The display pipeline may determine a crop region by converting the differing region to the display space and determine a partial frame region, based on the image data to be spatially processed, by the image processing circuitry. The display pipeline may also determine and retrieve a fetch region smaller than the image frame by converting the partial frame region to the source space.
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公开(公告)号:US11868162B2
公开(公告)日:2024-01-09
申请号:US18083193
申请日:2022-12-16
Applicant: Apple Inc.
Inventor: Assaf Menachem , Peter F. Holland , Yung-Chin Chen
CPC classification number: G06F3/1431 , G09G5/12 , G09G2310/08 , G09G2360/04
Abstract: A method may include receiving, via a processor, a frame of image data, such that the frame of image data may include an active portion and an idle portion. The active portion may include data for presenting one or more images via a first display of a first electronic device. The method may also include receiving a signal from a second electronic device during the idle portion of the frame of image data, such that the second electronic device is separate from the first display. The method may then involve initiating processing of the frame of image data in response to the signal being received from the second electronic device.
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公开(公告)号:US20230274720A1
公开(公告)日:2023-08-31
申请号:US18143353
申请日:2023-05-04
Applicant: Apple Inc.
Inventor: Assaf Menachem
CPC classification number: G09G5/14 , G09G5/377 , G06T1/20 , G09G5/12 , G09G2300/026 , G09G2370/20 , G09G2340/10 , G09G2320/08
Abstract: An electronic device may include a first display pipeline that may output image data via an output path. The electronic device may include first frame merge circuitry coupled to the output path. The electronic device may also include a first multiplexer coupled to the first frame merge circuitry and to the output path. The first multiplexer may transmit the image data from the output path to an electronic display, and, in response to a first control signal associated with the first frame merge circuitry generating a merged output, the first multiplexer transmits the merged output to the electronic display.
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