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    Communication channels with both shared and independent resources
    2.
    发明授权
    Communication channels with both shared and independent resources 有权

    公开(公告)号：US11824795B2

    公开(公告)日：2023-11-21

    申请号：US17455321

    申请日：2021-11-17

    Applicant: Apple Inc.

    Inventor： Rohit K. Gupta ,  Gregory S. Mathews ,  Harshavardhan Kaushikkar ,  Jeonghee Shin ,  Rohit Natarajan

    IPC: H04L12/801 ,  H04L47/80 ,  H04L47/25 ,  H04L47/10

    CPC classification number: H04L47/805 ,  H04L47/25 ,  H04L47/39

    Abstract: Techniques are disclosed relating to merging virtual communication channels in a portion of a computing system. In some embodiments, a communication fabric routes first and second classes of traffic with different quality-of-service parameters, using a first virtual channel for the first class and a second virtual channel for the second class. In some embodiments, a memory controller communicates, via the fabric, using a merged virtual channel configured to handle traffic from both the first virtual channel and the second virtual channel. In some embodiments, the system limits the rate at which an agent is allowed to transmit requests of the second class of traffic, but requests by the agent for the first class of traffic are not rate limited. Disclosed techniques may improve independence of virtual channels, relative to sharing the same channel in an entire system, without unduly increasing complexity.

    APPLICATION AWARE SOC MEMORY CACHE PARTITIONING
    4.
    发明申请
    APPLICATION AWARE SOC MEMORY CACHE PARTITIONING 有权

    公开(公告)号：US20210034527A1

    公开(公告)日：2021-02-04

    申请号：US16530216

    申请日：2019-08-02

    Applicant: Apple Inc.

    Inventor： Wolfgang H. Klingauf ,  Connie W. Cheung ,  Rohit K. Gupta ,  Rohit Natarajan ,  Vanessa Cristina Heppolette ,  Varaprasad V. Lingutla ,  Muditha Kanchana

    IPC: G06F12/0842 ,  G06F12/0895

    Abstract: Systems, apparatuses, and methods for dynamically partitioning a memory cache among a plurality of agents are described. A system includes a plurality of agents, a communication fabric, a memory cache, and a lower-level memory. The partitioning of the memory cache for the active data streams of the agents is dynamically adjusted to reduce memory bandwidth and increase power savings across a wide range of applications. A memory cache driver monitors activations and characteristics of the data streams of the system. When a change is detected, the memory cache driver dynamically updates the memory cache allocation policy and quotas for the agents. The quotas specify how much of the memory cache each agent is allowed to use. The updates are communicated to the memory cache controller to enforce the new policy and enforce the new quotas for the various agents accessing the memory.

    GUARANTEED REAL-TIME CACHE CARVEOUT FOR DISPLAYED IMAGE PROCESSING SYSTEMS AND METHODS
    8.
    发明申请
    GUARANTEED REAL-TIME CACHE CARVEOUT FOR DISPLAYED IMAGE PROCESSING SYSTEMS AND METHODS 有权

    公开(公告)号：US20230081746A1

    公开(公告)日：2023-03-16

    申请号：US17473754

    申请日：2021-09-13

    Applicant: Apple Inc.

    Inventor： Rohit Natarajan ,  Christopher P. Tann ,  Rohit K. Gupta

    IPC: G06T1/60 ,  G06F12/0895 ,  G06F12/0873 ,  G06T1/20

    Abstract: An electronic device may include an electronic display to display an image based on processed image data. The electronic device may also include image processing circuitry to generate the processed image data based on input image data and previously determined data stored in memory. The image processing circuitry may also operate according to real-time computing constraints. Cache memory may store the previously determined data in a provisioned section of the cache memory allotted to the image processing circuitry. Additionally, a controller may manage reading and writing of the previously determined data to the provisioned section of the cache memory.

    Configurable Interface Circuit
    9.
    发明申请
    Configurable Interface Circuit 有权

    公开(公告)号：US20230064369A1

    公开(公告)日：2023-03-02

    申请号：US17463292

    申请日：2021-08-31

    Applicant: Apple Inc.

    Inventor： Rohit K. Gupta ,  Rohit Natarajan ,  Jurgen M. Schulz ,  Harshavardhan Kaushikkar ,  Connie W. Cheung

    IPC: G06F12/0871 ,  G06F12/02 ,  G06F13/16 ,  H03K19/0175

    Abstract: A configurable interface circuit is disclosed. An integrated circuit (IC) having a particular configuration. The IC includes a memory system and a communication fabric coupled to the memory system. The IC further includes a plurality of agent circuits configured to make requests to the memory system that are in a first format that is not specific to the particular configuration of the IC. A plurality of interface circuits is coupled between corresponding ones of the plurality of agent circuits and the communication fabric. A given one of the plurality of interface circuits is configured to receive a request to the memory system in the first format and output the request in a second format that is specific to the particular configuration of the IC.

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