POWER DETECTION CIRCUIT
    1.
    发明申请

    公开(公告)号:US20170276705A1

    公开(公告)日:2017-09-28

    申请号:US15079364

    申请日:2016-03-24

    申请人: Apple Inc.

    IPC分类号: G01R15/09 G01R15/00

    CPC分类号: G01R15/09 G01R31/40

    摘要: An apparatus for detecting a change in a voltage level of a power supply is disclosed. An inverter coupled to a first power supply may generate a signal dependent upon a voltage level of a second power supply. A latch coupled to the first power supply may be set based on a first voltage level of the second power supply and a first value of the signal, and re-set based on a second voltage level of the second power supply and a second value of the signal different than the first value of the signal.

    Data signal adjustment for displays

    公开(公告)号:US11120747B2

    公开(公告)日:2021-09-14

    申请号:US16802756

    申请日:2020-02-27

    申请人: Apple Inc.

    IPC分类号: G09G3/3275

    摘要: A display may have an active area that includes display pixels. The display may include an inactive notch region that extends into the active area. Data lines may provide image data from display driver circuitry to the display pixels. The image data may include data signals that correspond to portions of the display that do not include pixels, such as the inactive notch region. The null data signals may cause nonuniformities in the displayed image. The null data signals may be adjusted to minimize the nonuniformities. Null data signals corresponding to the inactive notch region may be adjusted to have gray levels that gradually decrease with distance from the border between the inactive notch and the active area. All of the data signals corresponding to the inactive notch may be set to a uniform gray level.

    Data signal adjustment for displays

    公开(公告)号:US10607549B2

    公开(公告)日:2020-03-31

    申请号:US15989066

    申请日:2018-05-24

    申请人: Apple Inc.

    IPC分类号: G09G3/3275

    摘要: A display may have an active area that includes display pixels. The display may include an inactive notch region that extends into the active area. Data lines may provide image data from display driver circuitry to the display pixels. The image data may include data signals that correspond to portions of the display that do not include pixels, such as the inactive notch region. The null data signals may cause nonuniformities in the displayed image. The null data signals may be adjusted to minimize the nonuniformities. Null data signals corresponding to the inactive notch region may be adjusted to have gray levels that gradually decrease with distance from the border between the inactive notch and the active area. All of the data signals corresponding to the inactive notch may be set to a uniform gray level.

    REDUCED POWER SET-RESET LATCH BASED FLIP-FLOP

    公开(公告)号:US20170366170A1

    公开(公告)日:2017-12-21

    申请号:US15355109

    申请日:2016-11-18

    申请人: Apple Inc.

    IPC分类号: H03K3/012 H03K3/3562

    CPC分类号: H03K3/012 H03K3/35625

    摘要: An apparatus includes a master latch circuit including a first circuit and a second circuit, and a slave latch circuit including a third circuit and a fourth circuit. The first circuit and the second circuit may be coupled to a first shared circuit node, and the third circuit and the fourth circuit may be coupled to a second shared circuit node. The master latch circuit may be configured to store a value of an input signal in response to an assertion of a clock signal. The slave latch circuit may be configured to store an output value of the master latch circuit in response to a de-assertion of the clock signal. The master latch circuit may also be configured to de-couple the first shared circuit node from a ground reference node in response to the de-assertion of the clock signal.

    WIDE VOLTAGE RANGE LEVEL SHIFTING CIRCUIT WITH ISOLATION FUNCTION

    公开(公告)号:US20170331463A1

    公开(公告)日:2017-11-16

    申请号:US15151665

    申请日:2016-05-11

    申请人: Apple Inc.

    摘要: In an embodiment, an apparatus includes an input circuit coupled to a first power supply with a first voltage level, a power circuit coupled to a second power supply with a second voltage level, and an output driver. The input circuit may receive an input signal, and generate an inverted signal dependent upon the input signal. The power circuit may generate a power signal in response to first values of the input and the inverted signals, wherein a voltage level of the power signal may be dependent upon the second voltage level. The power circuit may also generate a third voltage level on the power signal in response to second values of the input and the inverted signals. The output driver may generate an output signal dependent upon the input signal. The output signal may transition between the voltage level of the power signal and the ground reference level.

    Wide voltage range level shifting circuit with isolation function

    公开(公告)号:US10296075B2

    公开(公告)日:2019-05-21

    申请号:US15151665

    申请日:2016-05-11

    申请人: Apple Inc.

    摘要: In an embodiment, an apparatus includes an input circuit coupled to a first power supply with a first voltage level, a power circuit coupled to a second power supply with a second voltage level, and an output driver. The input circuit may receive an input signal, and generate an inverted signal dependent upon the input signal. The power circuit may generate a power signal in response to first values of the input and the inverted signals, wherein a voltage level of the power signal may be dependent upon the second voltage level. The power circuit may also generate a third voltage level on the power signal in response to second values of the input and the inverted signals. The output driver may generate an output signal dependent upon the input signal. The output signal may transition between the voltage level of the power signal and the ground reference level.

    Data Signal Adjustment for Displays
    7.
    发明申请

    公开(公告)号:US20190073962A1

    公开(公告)日:2019-03-07

    申请号:US15989066

    申请日:2018-05-24

    申请人: Apple Inc.

    IPC分类号: G09G3/3275

    摘要: A display may have an active area that includes display pixels. The display may include an inactive notch region that extends into the active area. Data lines may provide image data from display driver circuitry to the display pixels. The image data may include data signals that correspond to portions of the display that do not include pixels, such as the inactive notch region. The null data signals may cause nonuniformities in the displayed image. The null data signals may be adjusted to minimize the nonuniformities. Null data signals corresponding to the inactive notch region may be adjusted to have gray levels that gradually decrease with distance from the border between the inactive notch and the active area. All of the data signals corresponding to the inactive notch may be set to a uniform gray level.

    Power detection circuit
    9.
    发明授权

    公开(公告)号:US10191086B2

    公开(公告)日:2019-01-29

    申请号:US15079364

    申请日:2016-03-24

    申请人: Apple Inc.

    IPC分类号: G11C7/00 G01R15/09 G01R31/40

    摘要: An apparatus for detecting a change in a voltage level of a power supply is disclosed. An inverter coupled to a first power supply may generate a signal dependent upon a voltage level of a second power supply. A latch coupled to the first power supply may be set based on a first voltage level of the second power supply and a first value of the signal, and re-set based on a second voltage level of the second power supply and a second value of the signal different than the first value of the signal.

    Reduced power set-reset latch based flip-flop

    公开(公告)号:US10033356B2

    公开(公告)日:2018-07-24

    申请号:US15355109

    申请日:2016-11-18

    申请人: Apple Inc.

    IPC分类号: H03K3/012 H03K3/3562

    摘要: An apparatus includes a master latch circuit including a first circuit and a second circuit, and a slave latch circuit including a third circuit and a fourth circuit. The first circuit and the second circuit may be coupled to a first shared circuit node, and the third circuit and the fourth circuit may be coupled to a second shared circuit node. The master latch circuit may be configured to store a value of an input signal in response to an assertion of a clock signal. The slave latch circuit may be configured to store an output value of the master latch circuit in response to a de-assertion of the clock signal. The master latch circuit may also be configured to de-couple the first shared circuit node from a ground reference node in response to the de-assertion of the clock signal.