公开(公告)号：US20240332297A1

公开(公告)日：2024-10-03

申请号：US18595286

申请日：2024-03-04

Applicant: Applied Materials, Inc.

Inventor： Ashish PAL ,  El Mehdi BAZIZI ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L27/092 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/41725 ,  H01L29/66545

Abstract: A semiconductor structure forming a complementary field-effect transistor (CFET) includes a metal gate, a bottom field effect transistor (FET) module, the bottom FET module including a plurality of channel layers extending through the metal gate in a first direction, and a bottom source/drain (S/D) contact electrically connected to the plurality of channel layers via a bottom epitaxial (epi) S/D and a bottom interface, and a top FET module stacked on the bottom FET module in a second direction that is orthogonal to the first direction, the top FET module including a plurality of channel layers extending through the metal gate in the first direction, and a top source/drain (S/D) contact electrically connected to the plurality of channel layers via a top epitaxial (epi) S/D and a top interface, wherein the bottom S/D contact and the top S/D contact each comprise cobalt (Co) or tungsten (W).

公开(公告)号：US20240069448A1

公开(公告)日：2024-02-29

申请号：US17900124

申请日：2022-08-31

Applicant: Applied Materials, Inc.

Inventor： Prayudi LIANTO ,  Liu JIANG ,  Marvin Louis BERNT ,  El Mehdi BAZIZI ,  Guan Huei SEE

IPC: G03F7/20 ,  G03F9/00

CPC classification number: G03F7/70633 ,  G03F9/7088

Abstract: A method for forming alignment marks leverages pad density and critical dimensions (CDs). In some embodiments, the method includes forming first and second alignment marks on a first substrate and a second substrate where the alignment marks have a width within 5% of the associated CD of copper pads on the respective substrates and forming a first and second dummy patterns around the first and second alignment marks. The first and second dummy patterns have dummy pattern densities within 5% of the respective copper pad density of the first and second substrates and CDs within 5% of the respective copper pad CDs. In some embodiments, alignment marks with physical dielectric material protrusions and recesses on opposite substrate surfaces may further enhance bonding.

公开(公告)号：US20230008858A1

公开(公告)日：2023-01-12

申请号：US17370835

申请日：2021-07-08

Applicant: Applied Materials, Inc.

Inventor： Ashish PAL ,  Yi ZHENG ,  El Mehdi BAZIZI

IPC: H01L29/06

Abstract: Embodiments of processing a substrate are provided herein. In some embodiments, a method of processing a substrate includes: depositing, via a first epitaxial growth process, an n-doped silicon material onto a substrate to form an n-doped layer while adjusting a ratio of dopant precursor to silicon precursor so that a dopant concentration of the n-doped layer increases from a bottom of the n-doped layer to a top of the n-doped layer; etching the n-doped layer to form a plurality of trenches having sidewalls that are tapered and a plurality of n-doped pillars therebetween; and filling the plurality of trenches with a p-doped material via a second epitaxial growth process to form a plurality of p-doped pillars.