公开(公告)号：US20230100863A1

公开(公告)日：2023-03-30

申请号：US17486334

申请日：2021-09-27

Applicant: Applied Materials, Inc.

Inventor： Prayudi LIANTO ,  Yin Wei LIM ,  James S. PAPANU ,  Guan Huei SEE ,  Eric J. BERGMAN ,  Nur Yasmeen Addina MOHAMED HELMI ISIK ,  Wei Ying Doreen YONG ,  Vicknesh SAHMUGANATHAN ,  Yi Kun Kelvin GOH ,  John Leonard SUDIJONO ,  Arvind SUNDARRAJAN

IPC: H01J37/32 ,  H01L21/306

Abstract: Methods and apparatus for processing a substrate area provided herein. For example, methods for enhancing surface hydrophilicity on a substrate comprise a) supplying, using a remote plasma source, water vapor plasma to a processing volume of a plasma processing chamber to treat a bonding surface of the substrate, b) supplying at least one of microwave power or RF power at a frequency from about 1 kHz to 10 GHz and a power from about 1 kW to 10 kW to the plasma processing chamber to maintain the water vapor plasma within the processing volume during operation, and c) continuing a) and b) until the bonding surface of the substrate has a hydrophilic contact angle of less than 10°.

公开(公告)号：US20190279902A1

公开(公告)日：2019-09-12

申请号：US15918673

申请日：2018-03-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Jungrae PARK ,  James S. PAPANU ,  Ajay KUMAR ,  Wei-Sheng LEI

IPC: H01L21/78 ,  H01L21/263 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/308 ,  B23K26/00 ,  B23K10/00

Abstract: Methods of dicing semiconductor wafers are described. In an example, a method of dicing a semiconductor wafer having integrated circuits thereon involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a multiple pass laser scribing process to provide a patterned mask with gaps exposing regions of the semiconductor wafer between the integrated circuits, the multiple pass laser scribing process including a first pass along a first edge scribing path, a second pass along a center scribing path, a third pass along a second edge scribing path, a fourth pass along the second edge scribing path, a fifth pass along the center scribing path, and a sixth pass along the first edge scribing path. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

公开(公告)号：US20220181142A1

公开(公告)日：2022-06-09

申请号：US17110940

申请日：2020-12-03

Applicant: APPLIED MATERIALS, INC.

Inventor： Chien-Kang HSIUNG ,  James S. PAPANU ,  Arvind SUNDARRAJAN

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/683 ,  H01L21/687

Abstract: Methods and apparatus for far edge trimming are provided herein. For example, an apparatus includes an integrated tool for processing a silicon substrate, comprising a vacuum substrate transfer chamber, an edge trimming apparatus coupled to the vacuum substrate transfer chamber and comprising a high pulse frequency laser and substrate support, wherein at least one of the high pulse frequency laser or the substrate support are movable with respect to each other and configured to trim about 2 mm to about 5 mm from a peripheral edge of a substrate when disposed on the substrate support, and a plasma etching apparatus coupled to the vacuum substrate transfer chamber and configured to etch silicon.