公开(公告)号：US20180374696A1

公开(公告)日：2018-12-27

申请号：US15844989

申请日：2017-12-18

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Roman GOUK ,  Guan Huei SEE ,  Yu GU ,  Arvind SUNDARRAJAN

IPC: H01L21/02 ,  H01L23/538 ,  H01L21/027 ,  H01L21/311 ,  G03F7/00 ,  H01L21/48

Abstract: Embodiments of the present disclosure generally describe methods of forming one or more device terminal redistribution layers using imprint lithography. The methods disclosed herein enable the formation of high aspect ratio interconnect structures at lower costs than conventional photolithography and etch processes. Further, the processes and methods described herein desirably remove, reduce, and/or substantially eliminate voids in the surrounding polymer layer formed during the polymer deposition process or subsequent thereto.

公开(公告)号：US20180327893A1

公开(公告)日：2018-11-15

申请号：US16033166

申请日：2018-07-11

Applicant: Applied Materials, Inc.

Inventor： Peijun DING ,  Rong TAO ,  Zheng XU ,  Daniel C. LUBBEN ,  Suraj RENGARAJAN ,  Michael A. MILLER ,  Arvind SUNDARRAJAN ,  Xianmin TANG ,  John C. FORSTER ,  Jianming FU ,  Roderick C. MOSELY ,  Fusen CHEN ,  Praburam GOPALRAJA

IPC: C23C14/04 ,  C23C14/56 ,  C23C14/35 ,  H01J37/32 ,  H01J37/34 ,  H01L21/285 ,  H01L21/768 ,  C23C14/34

CPC classification number: C23C14/046 ,  C23C14/345 ,  C23C14/3457 ,  C23C14/35 ,  C23C14/358 ,  C23C14/564 ,  C23C14/568 ,  H01J37/321 ,  H01J37/3402 ,  H01J37/3408 ,  H01J37/3441 ,  H01J2237/3327 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76876 ,  H01L21/76877 ,  H01L2221/1089

Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward wafer. The auxiliary magnets may be either permanent magnets or electromagnets.

公开(公告)号：US20230238287A1

公开(公告)日：2023-07-27

申请号：US17584669

申请日：2022-01-26

Applicant: Applied Materials, Inc. ,  NATIONAL UNIVERSITY OF SINGAPORE

Inventor： Prayudi LIANTO ,  Guan Huei SEE ,  Arvind SUNDARRAJAN ,  Muhammad Avicenna NARADIPA ,  Andrivo RUSYDI

IPC: H01L21/66 ,  H01L23/00

CPC classification number: H01L22/12 ,  H01L24/80 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: Methods and apparatus for processing a first substrate and a second substrate are provided herein. For example, a method of processing a substrate using extended spectroscopic ellipsometry (ESE) includes directing a beam from an extended spectroscopic ellipsometer toward a first surface of a first substrate and a second surface of a second substrate, which is different than the first substrate, determining in-situ ESE data from each of the first surface and the second surface during processing of the first substrate and the second substrate, measuring a change of phase and amplitude in determined in-situ ESE data, and determining one or more parameters of the first surface of the first substrate and the second surface of the second substrate using simultaneously complex dielectric function, optical conductivity, and electronic correlations from the measured change of phase and amplitude in the in-situ ESE data.

公开(公告)号：US20230100863A1

公开(公告)日：2023-03-30

申请号：US17486334

申请日：2021-09-27

Applicant: Applied Materials, Inc.

Inventor： Prayudi LIANTO ,  Yin Wei LIM ,  James S. PAPANU ,  Guan Huei SEE ,  Eric J. BERGMAN ,  Nur Yasmeen Addina MOHAMED HELMI ISIK ,  Wei Ying Doreen YONG ,  Vicknesh SAHMUGANATHAN ,  Yi Kun Kelvin GOH ,  John Leonard SUDIJONO ,  Arvind SUNDARRAJAN

IPC: H01J37/32 ,  H01L21/306

Abstract: Methods and apparatus for processing a substrate area provided herein. For example, methods for enhancing surface hydrophilicity on a substrate comprise a) supplying, using a remote plasma source, water vapor plasma to a processing volume of a plasma processing chamber to treat a bonding surface of the substrate, b) supplying at least one of microwave power or RF power at a frequency from about 1 kHz to 10 GHz and a power from about 1 kW to 10 kW to the plasma processing chamber to maintain the water vapor plasma within the processing volume during operation, and c) continuing a) and b) until the bonding surface of the substrate has a hydrophilic contact angle of less than 10°.

公开(公告)号：US20250062129A1

公开(公告)日：2025-02-20

申请号：US18450466

申请日：2023-08-16

Applicant: Applied Materials, Inc.

Inventor： Yin Wei LIM ,  Guan Huei SEE ,  Chang Bum YONG ,  Prayudi LIANTO ,  Arvind SUNDARRAJAN ,  Cheng SUN

IPC: H01L21/3065 ,  H01L23/00 ,  H01L25/065

Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.

公开(公告)号：US20240379411A1

公开(公告)日：2024-11-14

申请号：US18315972

申请日：2023-05-11

Applicant: Applied Materials, Inc.

Inventor： Peng SOU ,  Chang Bum YONG ,  Guan Huei SEE ,  Arvind SUNDARRAJAN

IPC: H01L21/768 ,  G03F7/20 ,  G03F7/30

Abstract: Apparatus and methods for fabricating an electronic device are provided herein. Some embodiments include selectively delivering, according to a digital transfer pattern, an electromagnetic radiation beam provided from a light source across portions of an electromagnetic radiation sensitive layer that comprises a first photosensitive layer disposed on a surface of a substrate and a second photosensitive layer disposed on the first photosensitive layer. The electromagnetic beam may be delivered at a plurality of different dosing levels. The first and second photosensitive layers have first and second exposure sensitivities. Some embodiments also include performing, after selectively delivering the electromagnetic radiation beam, a developing and/or curing process on the first and second photosensitive layers to form a first and second set of features, respectively, which are to be filled with a conductor during a deposition process.

公开(公告)号：US20220258304A1

公开(公告)日：2022-08-18

申请号：US17176839

申请日：2021-02-16

Applicant: Applied Materials, Inc. ,  NATIONAL UNIVERSITY OF SINGAPORE

Inventor： Prayudi LIANTO ,  Guan Huei SEE ,  Arvind SUNDARRAJAN ,  Andrivo RUSYDI ,  Muhammad Avicenna NARADIPA

IPC: B24B57/02 ,  G01N21/21

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method of processing a substrate using extended spectroscopic ellipsometry (ESE) includes directing a beam from an extended spectroscopic ellipsometer toward a surface of a substrate for determining in-situ ESE data therefrom during substrate processing, measuring a change of phase and amplitude in determined in-situ ESE data, and determining various aspects of the surface of the substrate using simultaneously complex dielectric function, optical conductivity, and electronic correlations from a measured change of phase and amplitude in the in-situ ESE data.

公开(公告)号：US20240387458A1

公开(公告)日：2024-11-21

申请号：US18199183

申请日：2023-05-18

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Arvind SUNDARRAJAN ,  Nirmalya MAITY ,  Balasubramanian PRANATHARTHIHARAN ,  Martinus Maria BERKENS

IPC: H01L25/065 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/367 ,  H01L23/522 ,  H01L25/00

Abstract: In some embodiments, a method for forming a multiple die stack comprises forming a first circuit wafer with multiple first circuit dies and a first circuit support layer on a bottom of the first circuit wafer where each first circuit die has a power and circuit layer underlying a power and signal layer, forming an interposer wafer with multiple interposer dies and an interposer support layer on a top of the interposer wafer where each interposer die has a power and signal layer underlying a power via and signal via layer, and hybrid bonding a top surface of the first circuit wafer to a bottom surface of the interposer wafer to form a first bonded wafer with electrical power and signal connections between the multiple first circuit dies and the multiple interposer dies where the interposer wafer provides structural support of the first bonded wafer during subsequent processing.

公开(公告)号：US20240266319A1

公开(公告)日：2024-08-08

申请号：US18105801

申请日：2023-02-03

Applicant: Applied Materials, Inc.

Inventor： Guan Huei SEE ,  Jinho AN ,  Arvind SUNDARRAJAN

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L24/80 ,  H01L21/561 ,  H01L21/76898 ,  H01L24/97 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/97

Abstract: Embodiments of methods of die stacking are provided herein. In some embodiments, a method of die stacking with die-to-wafer bonding includes: bonding a plurality of first dies to a substrate via a hybrid bonding process; performing a selective silicon (Si) thinning process to reduce a thickness of the plurality of first dies that are bonded to form a plurality of thinned first dies; passivating the plurality of thinned first dies to form a plurality of passivated thinned first dies to protect the plurality of thinned first dies; filling gaps between adjacent dies of the plurality of thinned first dies with a first fill material, wherein the plurality of passivated thinned first dies and the first fill material together form a first layer; and forming a plurality of first conductive vias through the first layer to the substrate.

公开(公告)号：US20240213028A1

公开(公告)日：2024-06-27

申请号：US18086150

申请日：2022-12-21

Applicant: Applied Materials, Inc.

Inventor： Guan Huei SEE ,  ChangBum YONG ,  Prayudi LIANTO ,  Cheng SUN ,  Arvind SUNDARRAJAN

IPC: H01L21/3065

CPC classification number: H01L21/3065

Abstract: A method of thinning a die engaged with a substrate is disclosed, utilizing dry etching of a top surface of the die with a plasma comprising fluorine to selectively remove the top surface of the die relative to a top surface of the substrate.