DIE BACKSIDE PROFILE for SEMICONDUCTOR DEVICES

    公开(公告)号:US20250062129A1

    公开(公告)日:2025-02-20

    申请号:US18450466

    申请日:2023-08-16

    Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.

    Grain Structure Engineering for Metal Gapfill Materials

    公开(公告)号:US20250038137A1

    公开(公告)日:2025-01-30

    申请号:US18225286

    申请日:2023-07-24

    Abstract: A method for depositing copper onto a substrate includes grain engineering to control the internal structure of the copper. In some embodiments, the method comprises depositing a grain control layer conformally onto a copper seed layer in a structure on the substrate where the grain control layer is a non-conducting material, etching the grain control layer using a direct deep reactive ion etch (DRIE) process to remove portions of the grain control layer on horizontal surfaces within the structure, and depositing a copper material onto the structure such that at least one grain parameter of the copper material is controlled, at least in part, by a remaining portion of the grain control layer on vertical surfaces of the structure. In some embodiments, the deposited copper material in the structure has a grain orientation normal to a horizontal surface of the structure.

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