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公开(公告)号:US20240331131A1
公开(公告)日:2024-10-03
申请号:US18128491
申请日:2023-03-30
Applicant: Applied Materials, Inc.
Inventor: Rahul Reddy KOMATIREDDI , Rohith CHERIKKALLIL , Sneha Rupa KONGARA , Satwik Swarup MISHRA , Sachin DANGAYACH , Si En CHAN , Remus Zhen Hui KOH , Prayudi LIANTO , Yin Wei LIM , Peng SUO , Krishnaprasad Reddy MALLAVARAM , Khor Wui CHENG
CPC classification number: G06T7/001 , G06T7/13 , G06T2207/20081 , G06T2207/20084 , G06T2207/30148
Abstract: A method, apparatus and system for the automatic detection and measurement of chipping defects on diced wafers includes receiving an image of at least a portion of a diced wafer, aligning the received image of the at least the portion of the diced wafer, determining edges of the at least the portion of the diced wafer depicted in the aligned, received image, automatically determining at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges, and measuring chipping defects on the at least the portion of the diced wafer using at least one determined, respective baseline. In some embodiments, the method, apparatus and system can further include applying a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer.
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公开(公告)号:US20240330671A1
公开(公告)日:2024-10-03
申请号:US18128496
申请日:2023-03-30
Applicant: Applied Materials, Inc.
Inventor: Rahul Reddy KOMATIREDDI , Rohith CHERIKKALLIL , Sneha Rupa KONGARA , Sachin DANGAYACH , Prayudi LIANTO , Peng SUO , Krishnaprasad Reddy MALLAVARAM , Satwik Swarup MISHRA , Si En CHAN , Remus Zhen Hui KOH , Khor Wui CHENG , Yin Wei LIM
IPC: G06N3/08
CPC classification number: G06N3/08
Abstract: A method and apparatus for training a learning model for the automatic detection and classification of defects on wafers includes receiving labeled images of wafer defects having multiple defect classifications, creating a first training set including the received labeled images of wafer defects, training the machine learning model to automatically detect and classify wafer defects in a first stage using the first training set, blending at least one set of at least two labeled images having different classifications to generate additional labeled image data, creating a second training set including the blended, additional labeled image data, and training the machine learning model to automatically detect and classify wafer defects in a second stage using the second training set. The trained machine learning model can then be applied to at least one unlabeled wafer image to determine at least one defect classification for the at least one unlabeled wafer image.
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公开(公告)号:US20230100863A1
公开(公告)日:2023-03-30
申请号:US17486334
申请日:2021-09-27
Applicant: Applied Materials, Inc.
Inventor: Prayudi LIANTO , Yin Wei LIM , James S. PAPANU , Guan Huei SEE , Eric J. BERGMAN , Nur Yasmeen Addina MOHAMED HELMI ISIK , Wei Ying Doreen YONG , Vicknesh SAHMUGANATHAN , Yi Kun Kelvin GOH , John Leonard SUDIJONO , Arvind SUNDARRAJAN
IPC: H01J37/32 , H01L21/306
Abstract: Methods and apparatus for processing a substrate area provided herein. For example, methods for enhancing surface hydrophilicity on a substrate comprise a) supplying, using a remote plasma source, water vapor plasma to a processing volume of a plasma processing chamber to treat a bonding surface of the substrate, b) supplying at least one of microwave power or RF power at a frequency from about 1 kHz to 10 GHz and a power from about 1 kW to 10 kW to the plasma processing chamber to maintain the water vapor plasma within the processing volume during operation, and c) continuing a) and b) until the bonding surface of the substrate has a hydrophilic contact angle of less than 10°.
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公开(公告)号:US20250062129A1
公开(公告)日:2025-02-20
申请号:US18450466
申请日:2023-08-16
Applicant: Applied Materials, Inc.
Inventor: Yin Wei LIM , Guan Huei SEE , Chang Bum YONG , Prayudi LIANTO , Arvind SUNDARRAJAN , Cheng SUN
IPC: H01L21/3065 , H01L23/00 , H01L25/065
Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.
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公开(公告)号:US20250038137A1
公开(公告)日:2025-01-30
申请号:US18225286
申请日:2023-07-24
Applicant: Applied Materials, Inc.
Inventor: Prayudi LIANTO , Marvin Louis BERNT , Tapash CHAKRABORTY , Yin Wei LIM , Jing XU
IPC: H01L23/00
Abstract: A method for depositing copper onto a substrate includes grain engineering to control the internal structure of the copper. In some embodiments, the method comprises depositing a grain control layer conformally onto a copper seed layer in a structure on the substrate where the grain control layer is a non-conducting material, etching the grain control layer using a direct deep reactive ion etch (DRIE) process to remove portions of the grain control layer on horizontal surfaces within the structure, and depositing a copper material onto the structure such that at least one grain parameter of the copper material is controlled, at least in part, by a remaining portion of the grain control layer on vertical surfaces of the structure. In some embodiments, the deposited copper material in the structure has a grain orientation normal to a horizontal surface of the structure.
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公开(公告)号:US20240331126A1
公开(公告)日:2024-10-03
申请号:US18128487
申请日:2023-03-30
Applicant: Applied Materials, Inc.
Inventor: Rahul Reddy KOMATIREDDI , Rohith CHERIKKALLIL , Sneha Rupa KONGARA , Satwik Swarup MISHRA , Sachin DANGAYACH , Si En CHAN , Remus Zhen Hui KOH , Prayudi LIANTO , Yin Wei LIM , Peng SUO , Krishnaprasad Reddy MALLAVARAM , Khor Wui CHENG
IPC: G06T7/00 , G06V10/764 , G06V10/82
CPC classification number: G06T7/0004 , G06V10/764 , G06V10/82 , G06T2207/30148
Abstract: A method and apparatus for training a learning model for automatic defect detection and classification of at least a portion of a processed wafer include receiving labeled images having defect classification types and features for portions of a post-processed wafer, creating a first training set comprising the received labeled images, training the machine learning model to automatically classify wafer portions based on at least one detected defect in respective wafer portions using the first training set, receiving labeled wafer profiles having respective downstream yield data, creating a second training set comprising the labeled wafer profiles and training the machine learning model, using the second training set, to automatically determine a respective downstream yield of a wafer based on a respective wafer profile. The machine learning model can be applied to at least one unlabeled wafer image to determine at least one defect classification for at least one portion of a wafer.
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