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公开(公告)号:US10483282B2
公开(公告)日:2019-11-19
申请号:US16267151
申请日:2019-02-04
发明人: Michael Wenyoung Tsiang , Praket P. Jha , Xinhai Han , Bok Hoen Kim , Sang Hyuk Kim , Myung Hun Ju , Hyung Jin Park , Ryeun Kwan Kim , Jin Chul Son , Saiprasanna Gnanavelu , Mayur G. Kulkarni , Sanjeev Baluja , Majid K. Shahreza , Jason K. Foster
IPC分类号: H01L21/02 , C23C16/02 , C23C16/505 , C23C16/52 , C23C16/40 , H01L27/11582 , H01L29/06 , H01L21/3115 , H01L27/11556 , H01L27/11575 , H01L27/11548 , H01L21/768 , C23C16/455 , H01L21/311 , H01L21/3105
摘要: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.
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公开(公告)号:US10403535B2
公开(公告)日:2019-09-03
申请号:US14824229
申请日:2015-08-12
发明人: Zheng John Ye , Jay D. Pinson, II , Hiroji Hanawa , Jianhua Zhou , Xing Lin , Ren-Guan Duan , Kwangduk Douglas Lee , Bok Hoen Kim , Swayambhu P. Behera , Sungwon Ha , Ganesh Balasubramanian , Juan Carlos Rocha-Alvarez , Prashant Kumar Kulshreshtha , Jason K. Foster , Mukund Srinivasan , Uwe P. Haller , Hari K. Ponnekanti
IPC分类号: H02N13/00 , H01L21/683 , H01L21/687
摘要: Embodiments of the present disclosure provide an electrostatic chuck for maintaining a flatness of a substrate being processed in a plasma reactor at high temperatures. In one embodiment, the electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, and the chuck body has a volume resistivity value of about 1×107 ohm-cm to about 1×1015 ohm-cm in a temperature of about 250° C. to about 700° C., and an electrode embedded in the body, the electrode is coupled to a power supply. In one example, the chuck body is composed of an aluminum nitride material which has been observed to be able to optimize chucking performance around 600° C. or above during a deposition or etch process, or any other process that employ both high operating temperature and substrate clamping features.
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公开(公告)号:US10199388B2
公开(公告)日:2019-02-05
申请号:US15214104
申请日:2016-07-19
发明人: Michael Wenyoung Tsiang , Praket P. Jha , Xinhai Han , Bok Hoen Kim , Sang Hyuk Kim , Myung Hun Ju , Hyung Jin Park , Ryeun Kwan Kim , Jin Chul Son , Saiprasanna Gnanavelu , Mayur G. Kulkarni , Sanjeev Baluja , Majid K. Shahreza , Jason K. Foster
IPC分类号: H01L21/02 , C23C16/02 , C23C16/40 , C23C16/455 , C23C16/505 , C23C16/52 , H01L27/11582 , H01L27/11556 , H01L21/3115 , H01L29/06 , H01L21/768 , H01L27/11548 , H01L27/11575 , H01L21/3105 , H01L21/311
摘要: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.
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