摘要:
A system for modifying the uniformity pattern of a thin film deposited in a plasma processing chamber includes a single radio-frequency (RF) power source that is coupled to multiple points on the discharge electrode of the plasma processing chamber. Positioning of the multiple coupling points, a power distribution between the multiple coupling points, or a combination of both are selected to at least partially compensate for a consistent non-uniformity pattern of thin films produced by the chamber. The power distribution between the multiple coupling points may be produced by an appropriate RF phase difference between the RF power applied at each of the multiple coupling points.
摘要:
Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about −100 MPa to about 100 MPa.
摘要:
Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.
摘要:
Embodiments of the disclosure provide methods and system for manufacturing film layers with minimum lithographic overlay errors on a semiconductor substrate. In one embodiment, a method for forming a film layer on a substrate includes supplying a deposition gas mixture including a silicon containing gas and a reacting gas onto a substrate disposed on a substrate support in a processing chamber, forming a plasma in the presence of the depositing gas mixture in the processing chamber, applying current to a plasma profile modulator disposed in the processing chamber while supplying the depositing gas mixture into the processing chamber, and rotating the substrate while depositing a film layer on the substrate.
摘要:
Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.
摘要:
Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a boron-containing amorphous carbon film is disclosed. The boron-containing amorphous carbon film comprises from about 10 to 60 atomic percentage of boron, from about 20 to about 50 atomic percentage of carbon, and from about 10 to about 30 atomic percentage of hydrogen.
摘要:
A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.
摘要:
Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about −100 MPa to about 100 MPa.
摘要:
The present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.
摘要:
Techniques are disclosed for methods and apparatuses for increasing the breakdown voltage while substantially reducing the voltage leakage of an electrostatic chuck at temperatures exceeding about 300 degrees Celsius in a processing chamber.