Abstract:
The present disclosure generally provides an apparatus and method for gas diffuser support structure for a vacuum chamber. The gas diffuser support structure comprises a backing plate having a central bore, and a gas deflector having a length and a width unequal to the length coupled to the backing plate by a plurality of outward fasteners coupled to a plurality of outward threaded holes formed in the backing plate, in which a spacer is disposed between the backing plate and the gas deflector, and in which a length to width ratio of the gas deflector is about 0.1:1 to about 10:1.
Abstract:
Embodiments of the present disclosure generally relate to methods for forming an organic light emitting diode (OLED) device. Forming the OLED device comprises depositing a first barrier layer on a substrate having an OLED structure disposed thereon. A first sublayer of a buffer layer is then deposited on the first barrier layer. The first sublayer of the buffer layer is cured with a mixed gas plasma. Curing the first sublayer comprises generating water from the mixed gas plasma in a process chamber in which the curing occurs. The deposition of the first sublayer and the curing of the first sublayer is repeated one or more times to form a completed buffer layer. A second barrier layer is then deposited on the completed buffer layer.
Abstract:
Embodiments described herein generally related to a method for manufacturing an encapsulating structure for a display device, more particularly, for manufacturing a TFE structure including a light scattering layer. The TFE structure further includes one or more barrier layers. All layers of the TFE structure are formed in a PECVD apparatus. The light scattering layer is formed by a PECVD process, in which a silicon containing precursor and a nitrogen containing precursor are introduced into the PECVD apparatus. The flow rate of the silicon containing precursor is equal to or greater than the flow rate of the nitrogen containing precursor. The light scattering layer enhances light out-coupling from a light emitting device disposed under the TFE structure.
Abstract:
Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.
Abstract:
Methods for forming an OLED device are described. An encapsulation structure having organic buffer layer and an interface layer disposed on the organic buffer layer sandwiched between barrier layers is deposited over an OLED structure. In one example, an OLED device includes a first barrier layer disposed on a region of a substrate having an OLED structure disposed thereon, a fluorinated buffer layer including a polymer material containing fluorine disposed on the first barrier layer, an interface layer including the polymer material on the fluorinated buffer layer, and a second barrier layer disposed on the interface layer.
Abstract:
Methods for forming an OLED device are described. An encapsulation layer having a buffer layer sandwiched between barrier layers is deposited over an OLED structure. The buffer layer is deposited on the first barrier layer and is cured with a fluorine-containing plasma at a temperature less than 100 degrees Celsius. The second barrier layer is then deposited on the buffer layer.
Abstract:
Methods for forming an OLED device are described. An encapsulation structure having organic buffer layer and an interface layer disposed on the organic buffer layer sandwiched between barrier layers is deposited over an OLED structure. In one example, the method includes depositing a first barrier layer on a region of a substrate having an OLED structure disposed thereon, depositing a buffer layer with a fluorine-containing plasma formed from a first gas mixture containing a polymer gas precursor and a fluorine containing gas on the first barrier layer, depositing an interface layer on the buffer layer with a second gas mixture containing the polymer gas precursor, and depositing a second barrier layer on the interface layer.
Abstract:
Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.
Abstract:
Embodiments described herein generally relate to a method and apparatus for encapsulating an OLED structure, more particularly, to a TFE structure for an OLED structure. The TFE structure includes at least one dielectric layer and at least two barrier layers, and the TFE structure is formed over the OLED structure. The at least one dielectric layer is deposited by atomic layer deposition (ALD). Having the at least one dielectric layer formed by ALD in the TFE structure improves the barrier performance of the TFE structure.
Abstract:
Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include source and drain electrodes formed on a substrate, a gate insulating layer formed on a substrate covering the source and drain electrodes, wherein the gate insulating layer is hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer comprising metal, and a gate electrode formed above or below the gate insulating layer