公开(公告)号：US20240347551A1

公开(公告)日：2024-10-17

申请号：US18750424

申请日：2024-06-21

Applicant: Applied Materials, Inc.

Inventor： Xiangxin RUI ,  Lai ZHAO ,  Jrjyan Jerry CHEN ,  Soo Young CHOI ,  Yujia ZHAI

IPC: H01L27/12 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L27/1255 ,  H01L27/1222 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L28/55 ,  H01L29/4908 ,  H01L29/78675

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

公开(公告)号：US20230274997A1

公开(公告)日：2023-08-31

申请号：US18195196

申请日：2023-05-09

Applicant: Applied Materials, Inc.

Inventor： Rodney S. LIM ,  Jung Bae KIM ,  Jiarui WANG ,  Yi CUI ,  Dong Kil YIM ,  Soo Young CHOI

IPC: H01L23/31 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L23/3192 ,  H01L27/1248 ,  H01L21/02211 ,  H01L21/0217 ,  H01L21/02274 ,  H01L29/786

Abstract: Embodiments of the present disclosure generally relate to nitrogen-rich silicon nitride and methods for depositing the same, and transistors and other devices containing the same. In one or more embodiments, a passivation film stack is provided and includes a silicon oxide layer disposed on a workpiece, a nitrogen-rich silicon nitride layer disposed on the silicon oxide layer, and a hydrogen-rich silicon nitride layer disposed on the nitrogen-rich silicon nitride layer. The hydrogen-rich silicon nitride layer has a greater hydrogen concentration than the nitrogen-rich silicon nitride layer.

公开(公告)号：US20220293793A1

公开(公告)日：2022-09-15

申请号：US17805161

申请日：2022-06-02

Applicant: Applied Materials, Inc.

Inventor： Jianheng LI ,  Lai ZHAO ,  Yujia ZHAI ,  Soo Young CHOI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  H01L21/02 ,  H01L27/32 ,  H01L51/05

Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm−2eV−1 to about 5e11 cm−2eV−1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.

公开(公告)号：US20210210737A1

公开(公告)日：2021-07-08

申请号：US17212920

申请日：2021-03-25

Applicant: Applied Materials, Inc.

Inventor： Tae Kyung WON ,  Soo Young CHOI ,  Sanjay D. YADAV

IPC: H01L51/56 ,  C23C16/34 ,  C23C16/505 ,  H01L51/52

Abstract: A method of encapsulating an organic light emitting diode (OLED) is provided. The method includes generating a first plasma in a process chamber, the first plasma having an electron density of at least 1011 cm−3 when an OLED device is positioned within the process chamber. The OLED device includes a substrate and an OLED formed on the substrate. The method further includes pretreating one or more surfaces of the OLED and substrate with the first plasma; depositing a first barrier layer comprising silicon and nitrogen over the OLED by generating a second plasma comprising silicon and nitrogen in the process chamber, the second plasma having an electron density of at least 1011 cm−3, and depositing a buffer layer over the first barrier layer; and depositing a second barrier layer comprising silicon and nitrogen over the buffer layer by generating a third plasma comprising silicon and nitrogen in the process chamber.

公开(公告)号：US20210066153A1

公开(公告)日：2021-03-04

申请号：US16557102

申请日：2019-08-30

Applicant: Applied Materials, Inc.

Inventor： Rodney S. LIM ,  Jung Bae KIM ,  Jiarui WANG ,  Yi CUI ,  Dong Kil YIM ,  Soo Young CHOI

IPC: H01L23/31 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02

Abstract: Embodiments of the present disclosure generally relate to nitrogen-rich silicon nitride and methods for depositing the same, and transistors and other devices containing the same. In one or more embodiments, a passivation film stack contains a silicon oxide layer disposed on a workpiece and a nitrogen-rich silicon nitride layer disposed on the silicon oxide layer. The nitrogen-rich silicon nitride layer has a silicon concentration of about 20 at % to about 35 at %, a nitrogen concentration of about 40 at % to about 75 at %, and a hydrogen concentration of about 10 at % to about 35 at %. In one or more examples, the passivation film stack contains the silicon oxide layer, the nitrogen-rich silicon nitride layer, and a third layer containing any type of silicon nitride, such as nitrogen-rich silicon nitride and/or hydrogen-rich silicon nitride.

公开(公告)号：US20200227249A1

公开(公告)日：2020-07-16

申请号：US16248265

申请日：2019-01-15

Applicant: Applied Materials, Inc.

Inventor： Jianheng LI ,  Lai ZHAO ,  Soo Young CHOI

IPC: H01L21/02 ,  H01L29/786 ,  H01L29/66

Abstract: The present disclosure relates to an improved large area substrate semiconductor device having a high density passivation layer, and method of fabrication thereof. More specifically, a high density SiN passivation layer is formed by plasma enhanced chemical vapor deposition of silane and nitrogen gases at low temperatures. Argon is added as a diluent gas in order to increase SiN passivation layer film density and overall film quality.

公开(公告)号：US20180114946A1

公开(公告)日：2018-04-26

申请号：US15843295

申请日：2017-12-15

Applicant: Applied Materials, Inc.

Inventor： Jrjyan Jerry CHEN ,  Xiangxin RUI ,  Soo Young CHOI

IPC: H01L51/52 ,  H01L21/67 ,  H01L21/687 ,  H01L21/677

CPC classification number: H01L51/5256 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67207 ,  H01L21/67742 ,  H01L21/68742 ,  H01L21/68785 ,  H01L21/68792

Abstract: Embodiments described herein generally relate to a method and apparatus for encapsulating an OLED structure, more particularly, to a TFE structure for an OLED structure. The TFE structure includes at least one dielectric layer and at least two barrier layers, and the TFE structure is formed over the OLED structure. The at least one dielectric layer is deposited by atomic layer deposition (ALD). Having the at least one dielectric layer formed by ALD in the TFE structure improves the barrier performance of the TFE structure.

公开(公告)号：US20180090300A1

公开(公告)日：2018-03-29

申请号：US15277774

申请日：2016-09-27

Applicant: Applied Materials, Inc.

Inventor： Lai ZHAO ,  Gaku FURUTA ,  Soo Young CHOI ,  Beom Soo PARK

IPC: H01J37/32 ,  C23C16/455

CPC classification number: H01J37/3244 ,  C23C16/4404 ,  C23C16/45565 ,  H01J37/32596 ,  H01J2237/3321 ,  H01J2237/3323

Abstract: The present disclosure generally relates to a gas distribution plate for ensuring deposition uniformity. The gas distribution plate has multiple concave portions on the downstream side to ensure uniform deposition in corner regions of the processing chamber.

公开(公告)号：US20180026055A1

公开(公告)日：2018-01-25

申请号：US15617888

申请日：2017-06-08

Applicant: Applied Materials, Inc.

Inventor： Xiangxin RUI ,  Lai ZHAO ,  Jrjyan Jerry CHEN ,  Soo Young CHOI ,  Yujia ZHAI

IPC: H01L27/12 ,  H01L29/786 ,  H01L49/02 ,  H01L29/49

CPC classification number: H01L27/1255 ,  H01L27/1222 ,  H01L27/1237 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L28/55 ,  H01L29/4908 ,  H01L29/78675

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include source and drain electrodes formed on a substrate, a gate insulating layer formed on a substrate covering the source and drain electrodes, wherein the gate insulating layer is hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer comprising metal, and a gate electrode formed above or below the gate insulating layer

公开(公告)号：US20150211120A1

公开(公告)日：2015-07-30

申请号：US14610489

申请日：2015-01-30

Applicant: Applied Materials, Inc.

Inventor： Lai ZHAO ,  Gaku FURUTA ,  Qunhua WANG ,  Robin L. TINER ,  Beom Soo PARK ,  Soo Young CHOI ,  Sanjay D. YADAV

IPC: C23C16/455 ,  H01J37/32

Abstract: The present disclosure relates to a corner spoiler designed to decrease high deposition rates on corner regions of substrates by changing the gas flow. In one embodiment, a corner spoiler for a processing chamber includes an L-shaped body fabricated from a dielectric material, wherein the L-shaped body is configured to change plasma distribution at a corner of a substrate in the processing chamber. The L-shaped body includes a first and second leg, wherein the first and second legs meet at an inside corner of the L-shaped body. The length of the first or second leg is twice the distance defined between the first or second leg and the inside corner. In another embodiment, a shadow frame for a depositing chamber includes a rectangular shaped body having a rectangular opening therethrough, and one or more corner spoilers coupled to the rectangular shaped body at corners of the rectangular shaped body.

Abstract translation: 本发明涉及一种设计用于通过改变气体流量来降低基板拐角区域的高沉积速率的拐角扰流板。 在一个实施例中，用于处理室的拐角扰流板包括由介电材料制成的L形主体，其中L形主体被配置为改变处理室中的基板的拐角处的等离子体分布。 L形本体包括第一和第二腿，其中第一和第二腿在L形体的内角处相交。 第一腿或第二腿的长度是在第一腿或第二腿与内角之间限定的距离的两倍。 在另一个实施例中，用于沉积室的阴影框架包括具有矩形开口的矩形体，以及在矩形体的角落处联接到矩形体的一个或多个拐角扰流板。