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    Biasing scheme for low supply headroom applications
    2.
    发明授权
    Biasing scheme for low supply headroom applications 有权
    低供应净空应用的偏置方案

    公开(公告)号：US07248101B2

    公开(公告)日：2007-07-24

    申请号：US11364030

    申请日：2006-03-01

    Applicant: Arya R. Behzad ,  Frank W. Singor

    Inventor： Arya R. Behzad ,  Frank W. Singor

    IPC: G05F1/10

    CPC classification number: H03F3/45183 ,  G05F3/262 ,  H03F2203/45508

    Abstract: Methods and apparatus for improving the current matching within current mirror circuits in applications such as low voltage integrated circuits. Embodiments of the present invention attempt to maintain the proper current ratio between reference and output supplies by adjusting the reference output of the current mirror. An existing reference voltage on the output side of the mirror can be used or a reference voltage can be created to be used for the voltage regulation of the reference side of the current mirror.

    Abstract translation: 用于改善电流镜像电路内的电流匹配的方法和装置，例如低压集成电路。 本发明的实施例通过调节电流镜的参考输出来尝试维持参考电压和输出电源之间的适当电流比。 可以使用反射镜的输出侧上的现有参考电压，或者可以创建用于电流镜的参考侧的电压调节的参考电压。

    Large gain range, high linearity, low noise MOS VGA
    4.
    发明授权
    Large gain range, high linearity, low noise MOS VGA 有权
    大增益范围，高线性度，低噪声MOS VGA

    公开(公告)号：US07132888B2

    公开(公告)日：2006-11-07

    申请号：US10809838

    申请日：2004-03-26

    Applicant: Arya R. Behzad

    Inventor： Arya R. Behzad

    IPC: H03F3/45

    CPC classification number: H03F1/3211 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0026 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/23 ,  H01L2924/00

    Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

    Abstract translation: 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.频率规划提供额外的图像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合的差分对放大器实现的失真消除，其具有与差分对源的当前转向结合动态修改的V ds。

    Linear quad variable gain amplifier and method for implementing same
    10.
    发明授权
    Linear quad variable gain amplifier and method for implementing same 失效
    线性四角可变增益放大器及其实现方法

    公开(公告)号：US6091275A

    公开(公告)日：2000-07-18

    申请号：US140376

    申请日：1998-08-26

    Applicant: Arya R. Behzad

    Inventor： Arya R. Behzad

    IPC: H03F3/45 ,  H03G1/00 ,  H03G3/10 ,  H03G7/06 ,  H03G3/30

    CPC classification number: H03G7/06 ,  H03G1/0023

    Abstract: A VGA control circuit includes a differential control voltage generator having an input coupled to an external control voltage and having a pair of control voltage outputs, a transfer function compression region TFCR compensator coupled to the differential control voltage generator, and a TFCR detector coupled to the TFCR compensator and developing a compensator activation signal in response to the detection of a TFCR state in the transfer curve. A method for controlling a VGA circuit exhibiting transfer function logarithmic compression includes detecting when a VGA circuit is entering a logarithmic compression state, and applying an exponential compensation signal to the VGA circuit to cancel the compression state. A VGA system includes a VGA control system developing a plurality of differential control signals and a plurality of VGA stages coupled to the plurality of differential control signals. The control system includes a differential offset generator coupled to an internally generated control voltage, and a plurality of swing limiters developing the plurality of differential control signals. The voltage applied to the differential offset generator is generated by a PTAT and a tanh.sup.-1 generator which has its input tied to the external control voltage.

    Abstract translation: VGA控制电路包括具有耦合到外部控制电压并具有一对控制电压输出的输入的差分控制电压发生器，耦合到差分控制电压发生器的传输函数压缩区域TFCR补偿器和耦合到差分控制电压发生器的TFCR检测器 TFCR补偿器，并且响应于传输曲线中的TFCR状态的检测而开发补偿器激活信号。 一种控制显示传递函数对数压缩的VGA电路的方法包括检测VGA电路何时进入对数压缩状态，以及向VGA电路施加指数补偿信号以取消压缩状态。 VGA系统包括开发多个差分控制信号的VGA控制系统和耦合到多个差分控制信号的多个VGA级。 控制系统包括耦合到内部产生的控制电压的差分偏移发生器以及展开多个差分控制信号的多个摆动限制器。 施加到差分偏移发生器的电压由PTAT和tanh-1发生器产生，其输入与外部控制电压相关。

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