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1.发明申请Method and apparatus for measuring dimension of a pattern formed on a semiconductor wafer 有权用于测量形成在半导体晶片上的图案的尺寸的方法和装置公开(公告)号：US20060288325A1
公开(公告)日：2006-12-21
申请号：US11342694
申请日：2006-01-31
IPC分类号： G06F17/50
CPC分类号： G03F7/70625
摘要： In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
摘要翻译： 在使用扫描电子显微镜创建半导体图案的SEM观察的成像配方的成像配方制作装置中，为了从观察图像测量布线宽度和图案的其他各种尺寸值的成像配方，从而 通过使用通过从CAD数据转换获得的CAD图像的分析，在最小时间内自动生成图案的形状，通过将CAD数据转换为图像格式来创建CAD图像的CAD图像创建单元， 量化宽度确定部分，亮度信息提供部分和图案形状变形处理部分; 使用由CAD图像创建单元创建的CAD图像来创建成像配方。
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公开(公告)号：USRE45224E1
公开(公告)日：2014-10-28
申请号：US12621307
申请日：2009-11-18
CPC分类号： G03F7/70625
摘要： In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
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公开(公告)号：USRE45204E1
公开(公告)日：2014-10-21
申请号：US12614358
申请日：2009-11-06
IPC分类号： G06F17/50
CPC分类号： G03F7/70625
摘要： In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
摘要翻译： 在使用扫描电子显微镜创建半导体图案的SEM观察的成像配方的成像配方制作装置中，为了从观察图像测量布线宽度和图案的其他各种尺寸值的成像配方，从而 通过使用通过从CAD数据转换获得的CAD图像的分析，在最小时间内自动生成图案的形状，通过将CAD数据转换为图像格式来创建CAD图像的CAD图像创建单元， 量化宽度确定部分，亮度信息提供部分和图案形状变形处理部分; 使用由CAD图像创建单元创建的CAD图像来创建成像配方。
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4.发明申请Method and apparatus for arranging recipe of scanning electron microscope and apparatus for evaluating shape of semiconductor device pattern 失效用于布置扫描电子显微镜配方的方法和装置以及用于评估半导体器件图案形状的装置公开(公告)号：US20060284081A1
公开(公告)日：2006-12-21
申请号：US11330215
申请日：2006-01-12
IPC分类号： G21K7/00
CPC分类号： H01J37/28 , H01J37/153 , H01J37/21 , H01J2237/1532 , H01J2237/216 , H01J2237/24592 , H01J2237/2487 , H01J2237/2816 , H01J2237/2817
摘要： In order to provide an imaging-recipe arranging or creating apparatus and method adapted so that selection rules for automatic arrangement of an imaging recipe can be optimized by teaching in a SEM apparatus or the like, the imaging-recipe arranging or creating apparatus in this invention that arranges an imaging recipe for SEM-observing a semiconductor pattern using a scanning electron microscope includes a database that receives and stores layout information of the above semiconductor pattern in a low-magnification field, and an imaging-recipe arranging unit which, on the basis of the database-stored semiconductor pattern layout information, arranges the imaging recipe automatically in accordance with the automatic arrangement algorithm that includes teaching-optimized selection rules for selecting an imaging point(s).
摘要翻译： 为了提供一种成像配方布置或创建装置和方法，适于使得通过在SEM装置等中的教导来优化成像配方的自动布置的选择规则，本发明的成像配方布置或创建装置 使用扫描型电子显微镜配置SEM观察半导体图案的成像配方，包括：数据库，其接收并存储在低倍率场中的上述半导体图案的布局信息;以及成像配方配置单元，其基于 数据库存储的半导体图案布局信息，根据包括用于选择成像点的教学优化选择规则的自动布置算法自动布置成像配方。
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公开(公告)号：US07559047B2
公开(公告)日：2009-07-07
申请号：US11342694
申请日：2006-01-31
CPC分类号： G03F7/70625
摘要： In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
摘要翻译： 在使用扫描电子显微镜创建半导体图案的SEM观察的成像配方的成像配方制作装置中，为了从观察图像测量布线宽度和图案的其他各种尺寸值的成像配方，从而 通过使用通过从CAD数据转换获得的CAD图像的分析，在最小时间内自动生成图案的形状，通过将CAD数据转换为图像格式来创建CAD图像的CAD图像创建单元， 量化宽度确定部分，亮度信息提供部分和图案形状变形处理部分; 使用由CAD图像创建单元创建的CAD图像来创建成像配方。
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6.发明授权Method and apparatus for arranging recipe of scanning electron microscope and apparatus for evaluating shape of semiconductor device pattern 失效用于布置扫描电子显微镜配方的方法和装置以及用于评估半导体器件图案形状的装置公开(公告)号：US07365322B2
公开(公告)日：2008-04-29
申请号：US11330215
申请日：2006-01-12
IPC分类号： G21K7/00
CPC分类号： H01J37/28 , H01J37/153 , H01J37/21 , H01J2237/1532 , H01J2237/216 , H01J2237/24592 , H01J2237/2487 , H01J2237/2816 , H01J2237/2817
摘要： In order to provide an imaging-recipe arranging or creating apparatus and method adapted so that selection rules for automatic arrangement of an imaging recipe can be optimized by teaching in a SEM apparatus or the like, the imaging-recipe arranging or creating apparatus in this invention that arranges an imaging recipe for SEM-observing a semiconductor pattern using a scanning electron microscope includes a database that receives and stores layout information of the above semiconductor pattern in a low-magnification field, and an imaging-recipe arranging unit which, on the basis of the database-stored semiconductor pattern layout information, arranges the imaging recipe automatically in accordance with the automatic arrangement algorithm that includes teaching-optimized selection rules for selecting an imaging point(s).
摘要翻译： 为了提供一种成像配方布置或创建装置和方法，适于使得通过在SEM装置等中的教导来优化成像配方的自动布置的选择规则，本发明的成像配方布置或创建装置 使用扫描型电子显微镜配置SEM观察半导体图案的成像配方，包括：数据库，其接收并存储在低倍率场中的上述半导体图案的布局信息;以及成像配方配置单元，其基于 数据库存储的半导体图案布局信息，根据包括用于选择成像点的教学优化选择规则的自动布置算法自动布置成像配方。
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公开(公告)号：US20100138801A1
公开(公告)日：2010-06-03
申请号：US12698201
申请日：2010-02-02
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G01R31/303
摘要： A system and a method for detecting a defect, capable of extracting a defect occurring depending on finishing accuracy required for circuit operation are provided. The system includes a timing analyzer for extracting a critical path in which a high accuracy is required for a signal transmission operation as compared with other portions based on circuit design data, a critical path extractor for comparing the circuit design data with layout design data on a pattern and for extracting graphical data including the critical path extracted by the timing analyzer, an inspection recipe creator for deciding a portion to be inspected, based on coordinate information on the graphical data including the critical path extracted by the critical path extractor, and an SEM defect review apparatus for acquiring an image of the decided portion to be inspected on a wafer according to an inspection recipe created by the inspection recipe creator.
摘要翻译： 提供一种用于检测缺陷的系统和方法，其能够提取根据电路操作所需的精加工精度而发生的缺陷。 该系统包括用于提取与其他部分相比基于电路设计数据而与信号传输操作相比需要高精度的关键路径的定时分析器，用于将电路设计数据与布局设计数据进行比较的关键路径提取器 基于关于包括由关键路径提取器提取的关键路径的图形数据的坐标信息，以及扫描电子显微镜（SEM）来提取包括由定时分析器提取的关键路径的图形数据，用于决定待检查部分的检查配方生成器 缺陷检查装置，用于根据由检查配方创建者创建的检查配方在晶片上获取所确定的待检查部分的图像。
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公开(公告)号：US07679055B2
公开(公告)日：2010-03-16
申请号：US11892675
申请日：2007-08-24
CPC分类号： G06T7/001 , G06T7/33 , G06T2207/10056 , G06T2207/30148
摘要： An evaluation method and apparatus is provided for evaluating a displacement between patterns of a pattern image by using design data representative of a plurality of patterns superimposed ideally. A first distance is measured for an upper layer pattern between a line segment of the design data and an edge of the charged particle radiation image, a second distance is measured for a lower layer pattern between a line segment of the design data and an edge of the charged particle radiation image; and an superimposition displacement is detected between the upper layer pattern and lower layer pattern in accordance with the first distance and second distance.
摘要翻译： 提供了一种评估方法和装置，用于通过使用表示叠加的多个图案的设计数据来理想地评估图案图案的图案之间的位移。 对于设计数据的线段和带电粒子辐射图像的边缘之间的上层图案测量第一距离，测量设计数据的线段与设计数据的边缘之间的较低层图案的第二距离 带电粒子辐射图像; 并且根据第一距离和第二距离在上层图案和下层图案之间检测叠加位移。
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公开(公告)号：US08019161B2
公开(公告)日：2011-09-13
申请号：US11717772
申请日：2007-03-14
IPC分类号： G06K9/46
CPC分类号： G01N23/2251
摘要： A workpiece size measurement method suitable for length measurement of multilayered circuit elements with increased complexities is disclosed. This method employs a technique for changing measurement conditions in a way pursuant to either an image of workpiece or the situation of a target semiconductor circuit element to be measured when measuring pattern sizes on the workpiece image using design data of the semiconductor circuit element. With such an arrangement, adequate measurement conditions are selectable in accordance with the state of workpiece image and/or the state of a circuit element formed on the workpiece, thereby making it possible to improve the measurement efficiency. A workpiece size measurement apparatus using the technique is also disclosed.
摘要翻译： 公开了一种适合于具有增加的复杂度的多层电路元件的长度测量的工件尺寸测量方法。 该方法采用在使用半导体电路元件的设计数据测量工件图像上的图案尺寸时，根据工件的图像或待测量的目标半导体电路元件的情况来改变测量条件的技术。 通过这样的布置，可以根据工件图像的状态和/或形成在工件上的电路元件的状态来选择适当的测量条件，从而可以提高测量效率。 还公开了使用该技术的工件尺寸测量装置。
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10.发明申请SAMPLE DIMENSION INSPECTING/MEASURING METHOD AND SAMPLE DIMENSION INSPECTING/MEASURING APPARATUS 有权样本尺寸检查/测量方法和样品尺寸检查/测量装置公开(公告)号：US20110158543A1
公开(公告)日：2011-06-30
申请号：US13041894
申请日：2011-03-07
IPC分类号： G06K9/00
CPC分类号： G01B15/04 , G03F1/86 , G06T7/001 , G06T7/13 , G06T2207/10061 , G06T2207/30148 , H01J37/222 , H01J37/28 , H01J2237/24592 , H01J2237/2817
摘要： One of principal objects of the present invention is to provide a sample dimension measuring method for detecting the position of an edge of a two-dimensional pattern constantly with the same accuracy irrespective of the direction of the edge and a sample dimension measuring apparatus. According to this invention, to accomplish the above object, it is proposed to correct the change of a signal waveform of secondary electrons which depends on the direction of scanning of an electron beam relative to the direction of a pattern edge of an inspection objective pattern. It is proposed that when changing the scanning direction of the electron beam in compliance with the direction of a pattern to be measured, errors in the scanning direction and the scanning position are corrected. In this configuration, a sufficient accuracy of edge detection can be obtained irrespective of the scanning direction of the electron beam.
摘要翻译： 本发明的主要目的之一是提供一种用于以与边缘的方向无关的方式以相同的精度恒定地检测二维图案的边缘的位置的样本尺寸测量方法和样本尺寸测量装置。 根据本发明，为了实现上述目的，提出了相对于检查对象图案的图案边缘的方向取决于电子束的扫描方向的二次电子的信号波形的变化。 建议当根据要测量的图案的方向改变电子束的扫描方向时，校正扫描方向和扫描位置的误差。 在该结构中，与电子束的扫描方向无关，可以获得足够的边缘检测精度。
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