公开(公告)号：US06856124B2

公开(公告)日：2005-02-15

申请号：US10191849

申请日：2002-07-09

Applicant: David Dearn ,  John Stuart Malcolm ,  Axel Pannwitz

Inventor： David Dearn ,  John Stuart Malcolm ,  Axel Pannwitz

IPC: G05F1/575 ,  G05F1/40

CPC classification number: G05F1/575

Abstract: A method and a circuit to achieve a low drop-out voltage regulator with a wide output load range has been achieved. A fast loop is introduced in the circuit. The circuit is internally compensated and uses a capacitor to ensure that the internal pole is more dominant than the output pole as in standard Miller compensation. The quiescent current is set being proportional to the output load current. No explicit low power drive stage is required. The whole output range is covered by one output drive stage. By that means the total consumption of quiescent or wasted current is reduced. An excellent PSRR is achieved due to load dependent bias current.

Abstract translation: 已经实现了实现具有宽输出负载范围的低压差稳压器的方法和电路。 电路中引入了快速回路。 该电路进行内部补偿，并使用电容器来确保内部极点与标准米勒补偿中的输出极点相比更为显着。 静态电流设置为与输出负载电流成比例。 不需要显式的低功耗驱动级。 整个输出范围由一个输出驱动级覆盖。 这样就可以减少静态或浪费电流的总消耗。 由于负载相关的偏置电流，实现了出色的PSRR。

公开(公告)号：US07747790B2

公开(公告)日：2010-06-29

申请号：US11947764

申请日：2007-11-29

Applicant: Axel Pannwitz

Inventor： Axel Pannwitz

IPC: G06F3/00 ,  G06F13/00 ,  H03K3/00

CPC classification number: H03K19/1732 ,  H03K17/005

Abstract: An integrated driver circuit is provided for a LIN bus comprises a first input terminal, a second input terminal, and an output terminal, which is to be connected to a bus line of the LIN bus and at which an output data signal, dependent on an input data signal, is output, whereby the output data signal is output according to a first or according to at least one second LIN bus specification depending on whether the input data signal is applied at the first input terminal or the at least second input terminal.

Abstract translation: 提供了一种用于LIN总线的集成驱动器电路，其包括第一输入端子，第二输入端子和输出端子，该第一输入端子，第二输入端子和输出端子将被连接到LIN总线的总线，并且其中输出数据信号依赖于 输出数据信号，由此根据第一输入数据信号是否在第一输入端或至少第二输入端施加输入数据信号，根据第一或根据至少一个第二LIN总线规范输出输出数据信号。

公开(公告)号：US20080015713A1

公开(公告)日：2008-01-17

申请号：US11819511

申请日：2007-06-27

Applicant: Axel Pannwitz

Inventor： Axel Pannwitz

IPC: G05B11/01

CPC classification number: B60W50/00 ,  B60R2021/01068 ,  B60W50/0098 ,  G05B9/02 ,  G05B2219/24125 ,  G05B2219/25158 ,  G06F11/0757

Abstract: A circuit arrangement is provided for controlling at least one actuator in a motor vehicle, comprising a microcontroller, a watchdog circuit with an active operating mode for monitoring the functionality of the microcontroller and a reduced activity operating mode, and with at least one microcontroller-controlled peripheral unit with a first operating mode for controlling at least one actuator. According to the invention, the peripheral unit has a second operating mode and is designed to change the actuator to a safe mode and/or to keep it in this mode when the peripheral unit is in the second operating mode, and the circuit arrangement is designed to operate the peripheral unit in the second operating mode at least whenever the watchdog circuit is in the reduced activity operating mode. The invention relates furthermore to a corresponding method for controlling at least one actuator in a motor vehicle.

Abstract translation: 提供了一种用于控制机动车辆中的至少一个致动器的电路装置，包括微控制器，具有用于监视微控制器的功能的主动操作模式的看门狗电路和减少的活动操作模式，以及至少一个由微控制器控制的 具有用于控制至少一个致动器的第一操作模式的外围单元。 根据本发明，外围单元具有第二操作模式，并且被设计成当外围单元处于第二操作模式时将致动器改变为安全模式和/或使其保持在该模式中，并且设计电路装置 至少每当看门狗电路处于减活动操作模式时，在第二操作模式下操作外围单元。 本发明还涉及用于控制机动车辆中的至少一个致动器的相应方法。

公开(公告)号：US08054911B2

公开(公告)日：2011-11-08

申请号：US11950361

申请日：2007-12-04

Applicant: Fred Liebermann ,  Axel Pannwitz

Inventor： Fred Liebermann ,  Axel Pannwitz

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49

CPC classification number: H04L25/085 ,  H03K17/16 ,  H03K17/162 ,  H03K17/163 ,  H03K2217/0027 ,  H04L25/0288

Abstract: A method is provided for edge formation of signals and transmitter/receiver component for a bus system. A transmitter/receiver component for a bus system comprises a driver transistor, which is to be looped between a bus line of the bus system and a reference potential and is used to output signals on the bus line, a control unit for the driver transistor, a high-frequency interference detector, which is configured in such a way that it detects a high-frequency interference level on the bus line of the bus system, whereby the control unit is configured in such a way that it controls the driver transistor, depending on the detected high-frequency interference level, in such a way that an edge steepness of the output signals increases when the high-frequency interference level on the bus line increases, and an edge steepness of the output signals decreases when the high-frequency interference level on the bus line decreases.

Abstract translation: 提供了一种用于总线系统的信号和发射器/接收器部件的边缘形成的方法。 用于总线系统的发射器/接收器部件包括驱动晶体管，其将在总线系统的总线和参考电位之间环绕并用于在总线上输出信号，用于驱动晶体管的控制单元， 高频干扰检测器，其被配置为使得其检测总线系统的总线上的高频干扰电平，由此控制单元被配置为使其控制驱动晶体管，依赖于 在检测到的高频干扰电平上，使得当总线上的高频干扰电平增加时，输出信号的边缘陡度增加，并且当高频干扰时输出信号的边缘陡度降低 总线线路下降。

公开(公告)号：US20080211546A1

公开(公告)日：2008-09-04

申请号：US11947764

申请日：2007-11-29

Applicant: Axel Pannwitz

Inventor： Axel Pannwitz

IPC: H03K3/00

CPC classification number: H03K19/1732 ,  H03K17/005

Abstract: An integrated driver circuit is provided for a LIN bus comprises a first input terminal, a second input terminal, and an output terminal, which is to be connected to a bus line of the LIN bus and at which an output data signal, dependent on an input data signal, is output, whereby the output data signal is output according to a first or according to at least one second LIN bus specification depending on whether the input data signal is applied at the first input terminal or the at least second input terminal.

Abstract translation: 提供了一种用于LIN总线的集成驱动器电路，其包括第一输入端子，第二输入端子和输出端子，该第一输入端子，第二输入端子和输出端子将被连接到LIN总线的总线，并且其中输出数据信号依赖于 输出数据信号，由此根据第一输入数据信号是否在第一输入端或至少第二输入端施加输入数据信号，根据第一或根据至少一个第二LIN总线规范输出输出数据信号。

公开(公告)号：US20080197912A1

公开(公告)日：2008-08-21

申请号：US11958339

申请日：2007-12-17

Applicant: Axel Pannwitz

Inventor： Axel Pannwitz

IPC: G05F3/02

CPC classification number: G05F3/30

Abstract: A circuit arrangement for generating a temperature-compensated voltage or current reference value (UREF) from a supply voltage (VCC) based on the bandgap principle comprises a PTAT circuit (201) for generating a PTAT signal (I1) proportional to the absolute temperature, a CTAT circuit (202) for generating a CTAT signal (UBE) inversely proportional to the absolute temperature, whereby for generating the temperature-compensated reference value (UREF), the PTAT signal (UBE) and the CTAT signal (I1) are superimposed, and a reference value monitoring circuit (203a, 203b, 203), which generates a reference value monitoring signal (UREF_OK) that indicates whether the reference value (UREF) is validly generated or not. The reference value monitoring circuit (203) is formed in such a way that it evaluates a current (I2) and/or a voltage in the CTAT circuit (202) and/or in the PTAT circuit (201) for generating the reference value monitoring signal (UREF_OK).

Abstract translation: 用于基于带隙原理从电源电压（VCC）产生温度补偿电压或电流参考值（UREF）的电路装置包括用于产生与绝对温度成比例的PTAT信号（I 1）的PTAT电路（201） ，用于产生与绝对温度成反比的CTAT信号（UBE）的CTAT电路（202），由此为了产生温度补偿参考值（UREF），PTAT信号（UBE）和CTAT信号（I 1）是 以及基准值监视电路（203a，203b，203），其生成表示是否有效地生成了基准值（UREF）的基准值监视信号（UREF_OK）。 参考值监视电路（203）以这样的方式形成，以便评估CTAT电路（202）和/或PTAT电路（201）中的电流（I 2）和/或电压以产生参考值 监控信号（UREF_OK）。

公开(公告)号：US06687103B2

公开(公告)日：2004-02-03

申请号：US10210958

申请日：2002-08-02

Applicant: Axel Pannwitz

Inventor： Axel Pannwitz

IPC: H02H320

CPC classification number: H02J7/0031

Abstract: The invention refers to a charge/discharge protection circuit for a rechargeable battery, where the protection circuit is integrated on a single chip, including the fusible link, the load current switch and the short-circuit switch. This is achieved by dividing the functions of the fusible link, the load current switch, and the short-circuit switch into in parallel arranged T-sections, each of which is designed for only a fraction of the nominal load so that each of the easily integrated fuse segments carry only the respective fraction of the nominal current. It is important that the entire protection circuit or its control logic will not be destroyed before through an unduly high over-voltage, in which case the sequential melting of the fuse segments would no longer be guaranteed. This is handled by a semiconductor switch which short-circuits the over-voltage immediately.

Abstract translation: 本发明涉及用于可再充电电池的充电/放电保护电路，其中保护电路集成在单个芯片上，包括可熔链路，负载电流开关和短路开关。 这通过将可熔链路，负载电流开关和短路开关的功能划分成并联布置的T形部分来实现，每个T形部分仅设计为标称负载的一小部分，使得每个容易 集成熔丝段仅承载额定电流的相应部分。 重要的是，整个保护电路或其控制逻辑在通过过高的过电压之前不会被破坏，在这种情况下，熔丝段的顺序熔化将不再得到保证。 这是由立即短路过电压的半导体开关来处理的。

公开(公告)号：US20080211114A1

公开(公告)日：2008-09-04

申请号：US11957347

申请日：2007-12-14

Applicant: Fred Liebermann ,  Axel Pannwitz

Inventor： Fred Liebermann ,  Axel Pannwitz

IPC: H01L23/49

CPC classification number: H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/20652 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor component is provided, particularly for LIN bus systems, having an integrated circuit, which on a top side has a plurality of terminal pads for coupling and/or decoupling of electrical signals, and having a plurality of electrically conductive contact reeds, which are electrically connected at least partially by connecting bonding wires to the respectively assigned terminal pads of the integrated circuit. Also, a connecting bonding wire and a shielding bonding wire is provided, which is disposed with both ends on a uniform electric potential, particularly on one of the contact reeds.

Abstract translation: 提供了一种特别用于LIN总线系统的半导体部件，具有集成电路，该集成电路在顶侧上具有用于耦合和/或解耦电信号的多个端子焊盘，并且具有多个导电接触簧片，它们是 至少部分地通过将接合线连接到集成电路的分配的端子焊盘来电连接。 此外，设置有连接接合线和屏蔽接合线，其两端设置在均匀的电位上，特别是在一个接触簧片上。

公开(公告)号：US20080205498A1

公开(公告)日：2008-08-28

申请号：US11950361

申请日：2007-12-04

Applicant: Fred Liebermann ,  Axel Pannwitz

Inventor： Fred Liebermann ,  Axel Pannwitz

IPC: H04B15/00 ,  G01R23/02 ,  H04B1/38

CPC classification number: H04L25/085 ,  H03K17/16 ,  H03K17/162 ,  H03K17/163 ,  H03K2217/0027 ,  H04L25/0288

Abstract: A method is provided for edge formation of signals and transmitter/receiver component for a bus system. A transmitter/receiver component for a bus system comprises a driver transistor, which is to be looped between a bus line of the bus system and a reference potential and is used to output signals on the bus line, a control unit for the driver transistor, a high-frequency interference detector, which is configured in such a way that it detects a high-frequency interference level on the bus line of the bus system, whereby the control unit is configured in such a way that it controls the driver transistor, depending on the detected high-frequency interference level, in such a way that an edge steepness of the output signals increases when the high-frequency interference level on the bus line increases, and an edge steepness of the output signals decreases when the high-frequency interference level on the bus line decreases.

Abstract translation: 提供了一种用于总线系统的信号和发射器/接收器部件的边缘形成的方法。 用于总线系统的发射器/接收器部件包括驱动晶体管，其将在总线系统的总线和参考电位之间环绕并用于在总线上输出信号，用于驱动晶体管的控制单元， 高频干扰检测器，其被配置为使得其检测总线系统的总线上的高频干扰电平，由此控制单元被配置为使其控制驱动晶体管，依赖于 在检测到的高频干扰电平上，使得当总线上的高频干扰电平增加时，输出信号的边缘陡度增加，并且当高频干扰时输出信号的边缘陡度降低 总线线路下降。

公开(公告)号：US06710992B2

公开(公告)日：2004-03-23

申请号：US10057490

申请日：2002-01-24

Applicant: Axel Pannwitz ,  Hans Martin von Staudt ,  Achim Stellberger

Inventor： Axel Pannwitz ,  Hans Martin von Staudt ,  Achim Stellberger

IPC: H02H320

CPC classification number: H02J7/0031

Abstract: The invention refers to a charge/discharge protection circuit for a rechargeable battery which is protected by a fusible link, where the rechargeable battery comprises a control logic which opens or closes a load switch depending on the magnitude of the battery voltage, the voltage on the charge/discharge terminals of the protection circuit and the charge/discharge current. The protection circuit is designed so that the electric strength needs to match only the actual maximum battery voltage, thus requiring little real estate on an IC chip and also allowing most components to be integrated.

Abstract translation: 本发明涉及一种可充电电池的充电/放电保护电路，其由易熔链路保护，其中可充电电池包括控制逻辑，该控制逻辑根据电池电压的大小， 保护电路的充电/放电端子和充放电电流。 保护电路的设计使得电气强度仅需要与实际的最大电池电压相匹配，因此在IC芯片上几乎不占用空间，并且还允许大多数组件被集成。