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公开(公告)号:US20240241154A1
公开(公告)日:2024-07-18
申请号:US18153479
申请日:2023-01-12
Inventor: Jeffrey Fitzgerald
IPC: G01R1/067
CPC classification number: G01R1/06772 , G01R1/06766
Abstract: A coaxial pad probe for coupling with a preexisting coaxial cable having a first end and a second end opposite to the first end and remote from an analyzing device. The coaxial pad probe includes a probe operably engaged with the second end of the preexisting coaxial cable. The probe is configured to directly contact a coaxial input/output (IO) connection provided on a mixed signal die or a coplanar IO connection provided on the mixed signal die for measuring an S-parameter measurement of the mixed signal die. The probe may include a support structure operably engaged with second end of the preexisting coaxial cable. The probe may also include a probe tip operably engaged with the support structure and configured to directly contact with the selected coaxial IO connection provided on the mixed signal die or the coplanar IO connection provided on the mixed signal die.
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公开(公告)号:US20240243074A1
公开(公告)日:2024-07-18
申请号:US18153470
申请日:2023-01-12
Inventor: Jeffrey Fitzgerald
CPC classification number: H01L23/552 , H01L21/561 , H01L21/568 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/19 , H01L24/95 , H01L25/105 , H01L25/18 , H01L25/50 , H01L2224/05551 , H01L2224/05552 , H01L2224/05555 , H01L2224/05571 , H01L2224/0603 , H01L2224/06051 , H01L2224/0616 , H01L2224/08237 , H01L2224/08238 , H01L2224/19 , H01L2224/95001 , H01L2225/1035
Abstract: A semiconductor package that may comprise a mixed signal die having a first surface operably engaged with an interconnect and a second surface opposite to the first surface, and at least one set of input/output (IO) connections on the mixed signal die. The at least one set of IO connections is configured to be electromagnetically shielded in a non-linear geometry from at least another set of IO connections that is different from the at least one set of IO connections.
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公开(公告)号:US20240242999A1
公开(公告)日:2024-07-18
申请号:US18153433
申请日:2023-01-12
Inventor: Jeffrey Fitzgerald
IPC: H01L21/683 , H01L23/00 , H01L23/31
CPC classification number: H01L21/6835 , H01L23/315 , H01L24/16 , H01L2221/68359 , H01L2224/16245 , H01L2924/01007 , H01L2924/01014 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033
Abstract: A semiconductor package that may include least one section having at least one die and at least one electrical structure operably engaged directly with the at least one die. Semiconductor package may also include at least another section having at least another die and at least another electrical structure operably engaged directly with the at least another die. The at least one section and the at least another section may be directly engaged with one another via wafer bonding of the at least one electrical structure and the at least another electrical structure. The at least one section and the at least another section may also be formed entirely of metal materials.
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