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公开(公告)号:US20220210909A1
公开(公告)日:2022-06-30
申请号:US17485155
申请日:2021-09-24
发明人: Sa LI , Xingjun SHU , Xiujun CAI , Wenli LAN , Yue AN , Fuan ZHU , Yadong ZHANG , Zuocheng ZHU , Runfei DU , Jiaqiang WANG , Xingpan SUN , Tingting ZHAO , Jianwu WU
摘要: The disclosure relates to the technical field of backlight structures, and discloses a backlight source and a display device. The backlight source includes a light bar and a metal frame; the side, containing the light bar, of the metal frame has a notch; the light bar includes a light-emitting unit; the light-emitting unit includes a plurality of light-emitting groups; each light-emitting group includes at least one first light-emitting group and at least one second light-emitting group, the first light-emitting group includes N light-emitting elements, the light-emitting element numbered n is connected in series with the light-emitting element numbered n+1 successively, the light-emitting element numbered 1 and the light-emitting element numbered N are arranged adjacently, and the light-emitting element numbered 1 and the light-emitting element numbered 2 are the farthest apart.
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公开(公告)号:US20200211480A1
公开(公告)日:2020-07-02
申请号:US16611452
申请日:2019-02-12
发明人: Desheng XIANG , Xi CHEN , Jianye TANG , Gaowei CHEN , Sa LI , Yadong ZHANG , Dawei WANG , Jiaqiang WANG , Jian REN , Yanming WANG , Cheng CHANG
摘要: A display device and its control method are disclosed. The display device includes: a display panel including a first display area and a second display area; at least one sensor located in the second display area and configured to operate according to the ambient light sensed by the second display area; wherein the second display area includes a plurality of staggered light-emitting areas and light-transmitting areas.
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公开(公告)号:US20230342020A1
公开(公告)日:2023-10-26
申请号:US17921073
申请日:2021-05-21
发明人: Xingjun SHU , Qingzhu GUAN , Shuang SHI , Jinlong ZHENG , Junjie XU , Yanming WANG , Sa LI , Fuan ZHU , Yue AN , Yadong ZHANG , Zongli GAO , Cuie WANG , Shuainan LIU , Shengwei YANG , Lidong WANG , Libao CUI , Runfei DU , Qi ZHANG
IPC分类号: G06F3/041 , G06F3/0488 , G06F3/044
CPC分类号: G06F3/0488 , G06F3/0416 , G06F3/0446
摘要: A gesture recognition method, apparatus and system based on coupling capacitance, which are configured to solve the technical problem in the prior art of it not being possible to recognize a complex gesture due to the fact that the coordinates of a manipulation body on a three-dimensional plane cannot be determined. The method comprises: establishing a spatial rectangular coordinate system by taking a first position point of a contact face of a capacitive touch screen as an origin; acquiring an X-axis coordinate and a Y-axis coordinate, in the spatial rectangular coordinate system, corresponding to a first sensor; acquiring the difference between a first coupling capacitance value and a second coupling capacitance value, and determining a Z-axis coordinate of at least one manipulation body in the spatial rectangular coordinate system according to the difference; and generating a movement trajectory of the at least one manipulation body according to a change in spatial coordinates of the at least one manipulation body in the spatial rectangular coordinate system, and identifying the movement trajectory to obtain a gesture recognition result.
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公开(公告)号:US20240219788A1
公开(公告)日:2024-07-04
申请号:US17913500
申请日:2021-10-26
发明人: Ting LI , Wenhua SONG , Bo WU , Zhengdong ZHANG , Pengcheng ZANG , Yadong ZHANG
IPC分类号: G02F1/1362 , G02F1/1368
CPC分类号: G02F1/136254 , G02F1/136222 , G02F1/136286 , G02F1/1368
摘要: The present disclosure provides a display substrate, a display module and a display device. The display substrate has a display region and a test pad region disposed on a side of the display region, and includes: a base; at least one pad disposed on the base and located in the test pad region; a first spacing layer disposed on a side of the pad away from the base; and a plurality of support parts and at least one test signal line, which are located in the test pad region, the support parts and the test signal line are disposed on a side of the first spacing layer away from the base, one end of each test signal line is connected to one pad, and the other end of each test signal line is configured to be connected to an array test device; and at least two of the plurality of support parts are arranged along a first direction which intersects a direction pointing to the test pad region from the display region, each of the support parts has a support end away from the base, and the support end projects from a surface of the test signal line on a side away from the base.
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公开(公告)号:US20210193019A1
公开(公告)日:2021-06-24
申请号:US16984939
申请日:2020-08-04
发明人: Ting LI , Yuanjie XU , Bo WU , Zhonglin CAO , Pengcheng ZANG , Jing HE , Yadong ZHANG , Yao LI
IPC分类号: G09G3/20
摘要: The disclosure provides a display substrate, a driving method thereof and a display device. The display substrate includes: a base substrate with a hole in a hole region of the base substrate; a plurality of first signal lines, on a first side of the hole; and a plurality of second signal lines, on the other side of the hole distal to the first side; a plurality of first switch units, at terminals of the plurality of first signal lines proximal to the hole and electrically coupled to the plurality of first signal lines in one-to-one correspondence; a plurality of second switch units, at terminals of the plurality of second signal lines proximal to the hole; a plurality of connection lines comprising a plurality of first connection lines, a plurality of second connection lines and a plurality of third connection lines.
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公开(公告)号:US20230395008A1
公开(公告)日:2023-12-07
申请号:US18032512
申请日:2020-10-21
发明人: Wei YAN , Wenwen QIN , Yue SHAN , Deshuai WANG , Jiguo WANG , Zhen WANG , Xiaoyan YANG , Han ZHANG , Jian ZHANG , Yadong ZHANG , Jian SUN
CPC分类号: G09G3/20 , G11C19/28 , G09G2310/0286
摘要: A shift register unit, a driving method, a drive circuit, and a display apparatus are disclosed. The shift register unit includes: a control circuit, which is configured to adjust signals of a first node and a second node according to an input signal end, a first control signal end, a second control signal end and a first reference signal end; a cascade circuit, which is configured to provide, according to the signal of the first node, a signal of a first cascade clock signal end to a cascade output end; and an output circuit, which is configured to provide, according to the signal of the first node, a signal of a control clock signal end to a drive output end, and provide, according to the signal of the second node, a signal of a second reference signal end to the drive output end.
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公开(公告)号:US20230154933A1
公开(公告)日:2023-05-18
申请号:US17622708
申请日:2021-01-29
发明人: Jiguo WANG , Jian SUN , Zhao ZHANG , Liang TIAN , Weida QIN , Zhen WANG , Han ZHANG , Wenwen QIN , Xiaoyan YANG , Yue SHAN , Wei YAN , Jian ZHANG , Deshuai WANG , Yadong ZHANG , Jiantao LIU
IPC分类号: H01L27/12 , G02F1/1362 , G02F1/1368
CPC分类号: H01L27/124 , G02F1/13629 , G02F1/136213 , H01L27/1255 , G02F1/1368 , G02F1/136209 , G02F1/136222
摘要: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); and a reflective electrode layer, wherein the reflective electrode layer includes a plurality of reflective electrodes (18) that are mutually disconnected, each of the reflective electrodes (18) is located in one of the sub-pixel regions (101) and is electrically connected to the sub-pixel circuit through the first via hole (170).
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公开(公告)号:US20240258335A1
公开(公告)日:2024-08-01
申请号:US18630971
申请日:2024-04-09
发明人: Jiguo WANG , Jian SUN , Zhao ZHANG , Liang TIAN , Weida QIN , Zhen WANG , Han ZHANG , Wenwen QIN , Xiaoyan YANG , Yue SHAN , Wei YAN , Jian ZHANG , Deshuai WANG , Yadong ZHANG , Jiantao LIU
IPC分类号: H01L27/12 , G02F1/1362 , G02F1/1368
CPC分类号: H01L27/124 , G02F1/136209 , G02F1/136213 , G02F1/136222 , G02F1/13629 , G02F1/1368 , H01L27/1255
摘要: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; and a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); where the pattern unit (171a) further includes a second bump (1712) located within a central area surrounded by each of the first bumps (1710), and the spacing groove (1711) on a same side of the first bump (1710) and the second bump (1712) is arranged in a non-straight shape.
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公开(公告)号:US20240212772A1
公开(公告)日:2024-06-27
申请号:US17794991
申请日:2021-09-28
发明人: Wei YAN , Zhen WANG , Wenwen QIN , Han ZHANG , Deshuai WANG , Jian ZHANG , Yue SHAN , Xiaoyan YANG , Yadong ZHANG , Jian SUN
CPC分类号: G11C19/28 , G09G3/20 , G09G2310/0286
摘要: A shift register and a driving method therefor, a gate driving circuit and a display device are provided, wherein the shift register includes a pull-up control sub-circuit configured to provide a signal of a first signal terminal or a second signal terminal to a pull-up control node under control of a first input terminal and a second output terminal; the pull-down control sub-circuit is configured to provide a signal of a first power supply terminal or a second power supply terminal to a pull-down node under control of the pull-up control node, the first signal terminal, the second signal terminal, a first clock signal terminal and a second clock signal terminal; the output sub-circuit is configured to supply a signal of a third clock signal terminal to a first output terminal and a signal of a fourth clock signal terminal to the second output terminal.
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