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公开(公告)号:US20220334424A1
公开(公告)日:2022-10-20
申请号:US17417424
申请日:2020-12-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Kai CHEN , Yanqing CHEN , Ruichao LIU , Jie TONG , Xiaofeng ZHANG , Weida QIN , Ning WANG , Yan WANG , Wei LI , Haoyi XIN
IPC: G02F1/1339 , G02F1/1335 , G02F1/1333
Abstract: A display panel includes a display region and a photoelectric sensing region, a plurality of spacer, a plurality of first support pillars, a plurality of second support pillars, and a plurality of third support pillars. The display region is located outside the photoelectric sensing region; and the photoelectric sensing region includes a light transmitting region and a frame area surrounding the light transmitting region, and the frame region includes: a first region, a second region, and a third region. The plurality of the spacers are arranged in an array, and located within the display region, but not located within the light transmitting region. The plurality of the first support pillars are located within the first region. The plurality of the second support pillars are located within the second region. The plurality of the third support pillars are located within the third region.
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公开(公告)号:US20220320345A1
公开(公告)日:2022-10-06
申请号:US17845568
申请日:2022-06-21
Inventor: Yanqing CHEN , Jianyun XIE , Wei LI , Cheng LI , Pan GUO , Yanfeng LI , Weida QIN , Ning WANG
IPC: H01L29/786 , H01L23/552 , H01L27/12
Abstract: The embodiments of the present disclosure provide an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a substrate, wherein the substrate has a display region and a peripheral region surrounding the display region, the display region has a plurality of pixels arranged in an array, and each of the plurality of pixels includes a light transmission region and a light shielding region, and a light shielding block covering at least a part of the light transmission region of at least one pixel close to the peripheral region of the plurality of pixels.
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公开(公告)号:US20230343874A1
公开(公告)日:2023-10-26
申请号:US18343279
申请日:2023-06-28
Inventor: Yanqing CHEN , Jianyun XIE , Wei LI , Cheng LI , Pan GUO , Yanfeng LI , Weida QIN , Ning WANG
IPC: H01L29/786 , H01L23/552 , H01L27/12
CPC classification number: H01L29/78633 , H01L23/552 , H01L27/1259
Abstract: The embodiments of the present disclosure provide an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a substrate, wherein the substrate has a display region and a peripheral region surrounding the display region, the display region has a plurality of pixels arranged in an array, and each of the plurality of pixels includes a light transmission region and a light shielding region, and a light shielding block covering at least a part of the light transmission region of at least one pixel close to the peripheral region of the plurality of pixels.
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公开(公告)号:US20230154933A1
公开(公告)日:2023-05-18
申请号:US17622708
申请日:2021-01-29
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiguo WANG , Jian SUN , Zhao ZHANG , Liang TIAN , Weida QIN , Zhen WANG , Han ZHANG , Wenwen QIN , Xiaoyan YANG , Yue SHAN , Wei YAN , Jian ZHANG , Deshuai WANG , Yadong ZHANG , Jiantao LIU
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/13629 , G02F1/136213 , H01L27/1255 , G02F1/1368 , G02F1/136209 , G02F1/136222
Abstract: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); and a reflective electrode layer, wherein the reflective electrode layer includes a plurality of reflective electrodes (18) that are mutually disconnected, each of the reflective electrodes (18) is located in one of the sub-pixel regions (101) and is electrically connected to the sub-pixel circuit through the first via hole (170).
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公开(公告)号:US20240219780A1
公开(公告)日:2024-07-04
申请号:US18610520
申请日:2024-03-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Kai CHEN , Yanqing CHEN , Ruichao LIU , Jie TONG , Xiaofeng ZHANG , Weida QIN , Ning WANG , Yan WANG , Wei LI , Haoyi XIN
IPC: G02F1/1339 , G02F1/1333 , G02F1/1335
CPC classification number: G02F1/13394 , G02F1/13338 , G02F1/133512 , G02F1/133514 , G02F1/13396
Abstract: A display panel includes a display region and a photoelectric sensing region, a plurality of spacer, a plurality of first support pillars, a plurality of second support pillars, and a plurality of third support pillars. The display region is located outside the photoelectric sensing region; and the photoelectric sensing region includes a light transmitting region and a frame area surrounding the light transmitting region, and the frame region includes: a first region, a second region, and a third region. The plurality of the spacers are arranged in an array, and located within the display region, but not located within the light transmitting region. The plurality of the first support pillars are located within the first region. The plurality of the second support pillars are located within the second region. The plurality of the third support pillars are located within the third region.
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公开(公告)号:US20210336065A1
公开(公告)日:2021-10-28
申请号:US16343485
申请日:2018-11-02
Inventor: Yanqing CHEN , Jianyun XIE , Wei LI , Cheng LI , Pan GUO , Yanfeng LI , Weida QIN , Ning WANG
IPC: H01L29/786 , H01L27/12 , H01L23/552
Abstract: The embodiments of the present disclosure provide an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a substrate, wherein the substrate has a display region and a peripheral region surrounding the display region, the display region has a plurality of pixels arranged in an array, and each of the plurality of pixels includes a light transmission region and a light shielding region, and a light shielding block covering at least a part of the light transmission region of at least one pixel close to the peripheral region of the plurality of pixels.
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公开(公告)号:US20240258335A1
公开(公告)日:2024-08-01
申请号:US18630971
申请日:2024-04-09
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiguo WANG , Jian SUN , Zhao ZHANG , Liang TIAN , Weida QIN , Zhen WANG , Han ZHANG , Wenwen QIN , Xiaoyan YANG , Yue SHAN , Wei YAN , Jian ZHANG , Deshuai WANG , Yadong ZHANG , Jiantao LIU
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/136209 , G02F1/136213 , G02F1/136222 , G02F1/13629 , G02F1/1368 , H01L27/1255
Abstract: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; and a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); where the pattern unit (171a) further includes a second bump (1712) located within a central area surrounded by each of the first bumps (1710), and the spacing groove (1711) on a same side of the first bump (1710) and the second bump (1712) is arranged in a non-straight shape.
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公开(公告)号:US20230027406A1
公开(公告)日:2023-01-26
申请号:US17788024
申请日:2021-05-12
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Yan WANG , Yanqing CHEN , Wei LI , Ning WANG , Weida QIN , Zhao ZHANG , Jing LI , Feng YANG
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
Abstract: A method of manufacturing an array substrate, includes: providing a substrate; forming a gate conductive layer including at least one first alignment mark; forming a source-drain conductive thin film; aligning a first mask and the substrate on which the gate conductive layer and the source-drain conductive thin film have been formed according to the at least one first alignment mark; patterning the source-drain conductive thin film by using the first mask to form at least one second alignment mark to obtain a source-drain conductive layer; forming a black matrix thin film; aligning a second mask and the substrate on which the gate conductive layer, the source-drain conductive layer and the black matrix thin film have been formed according to the at least one second alignment mark; patterning the black matrix thin film by using the second mask to form a black matrix; and forming a color filter layer.
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公开(公告)号:US20230017000A1
公开(公告)日:2023-01-19
申请号:US17950131
申请日:2022-09-22
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhao ZHANG , Yanqing CHEN , Wei LI , Weida QIN , Kai CHEN , Jiguo WANG , Wei YAN , Xiaofeng ZHANG , Zeliang LI , Jian ZHANG , Zhen WANG
IPC: G02F1/1362 , G02F1/1335 , G02F1/13363 , G02F1/1333 , G02F1/1343 , G02F1/1341 , G06F3/041 , G06F3/044
Abstract: A display panel includes a second substrate. The second substrate includes a second base substrate and a shielding layer, an array structure layer, an insulating layer and a reflective layer which are sequentially disposed on a second base substrate, the array structure layer includes gate lines; the shielding layer includes a plurality of groups of light shielding units sequentially arranged along a first direction, each group of the light shielding units includes a plurality of independent sub-light shielding units sequentially arranged along a second direction, the reflective layer includes a plurality of reflective units arranged in an array, the plurality of reflective units form a plurality of reflective rows and a plurality of reflective columns, a first space area is formed between adjacent reflective columns, and a second space area is formed between adjacent reflective rows forms.
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公开(公告)号:US20220163841A1
公开(公告)日:2022-05-26
申请号:US17348990
申请日:2021-06-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiaofeng ZHANG , Jianyun XIE , Yanqing CHEN , Jie TONG , Weida QIN , Zhao ZHANG
IPC: G02F1/1335
Abstract: The present disclosure provides a color filter substrate, including: a base substrate, and a light-shielding pattern on the base substrate and having a plurality of openings to define a plurality of pixel regions, wherein each of the plurality of pixel regions at least includes a color filtering region, and a color filtering layer is filled in each color filtering region, and at least one of the plurality of pixel regions further includes at least one transparent region, each of which is filled with a transparent non-filtering layer. The present disclosure further provides a reflective display panel and a manufacturing method for a color filter substrate.
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