公开(公告)号：US11798959B2

公开(公告)日：2023-10-24

申请号：US16965495

申请日：2019-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu ,  Tianmin Zhou ,  Lizhong Wang

IPC: H01L27/00 ,  H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1248

Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

公开(公告)号：US20230317740A1

公开(公告)日：2023-10-05

申请号：US18021090

申请日：2022-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Ce Ning ,  Yunping Di ,  Binbin Tong ,  Rui Huang ,  Tianmin Zhou ,  Wei Yang ,  Liping Lei

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/127

Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.

公开(公告)号：US10553621B2

公开(公告)日：2020-02-04

申请号：US16302850

申请日：2018-03-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe Hu ,  Wei Yang ,  Xinhong Lu ,  Ke Wang ,  Yu Wen

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L27/32

Abstract: Embodiment of the present disclosure provide a thin-film transistor structure, a manufacturing method thereof, a display panel and a display device. The thin-film transistor structure includes: a base substrate; and a first thin-film transistor and a second thin-film transistor formed on the base substrate, wherein a first active layer of the first thin-film transistor is doped with hydrogen; a material of a second active layer of the second thin-film transistor is metal oxide; and a first isolation barrier surrounding the first thin-film transistor and/or a second isolation barrier surrounding the second thin-film transistor are disposed on the base substrate.

公开(公告)号：US10431694B2

公开(公告)日：2019-10-01

申请号：US16165316

申请日：2018-10-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L21/425 ,  H01L29/786 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/027 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  G02F1/1368

Abstract: The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

公开(公告)号：US10242886B2

公开(公告)日：2019-03-26

申请号：US15569728

申请日：2017-04-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L21/477 ,  H01L21/77 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: A method for fabricating an array substrate is disclosed. The method comprises: forming a first oxide semiconductor active layer of a first TFT in a GOA area of a substrate; performing a first annealing process on the first oxide semiconductor active layer at a first temperature; forming a first insulating layer which covers the first oxide semiconductor active layer; performing a second annealing process on the first oxide semiconductor active layer at a second temperature, wherein the second temperature is lower than the first temperature. This improves a forward bias stability of the first TFT and increases the device lifetime.

公开(公告)号：US10192996B2

公开(公告)日：2019-01-29

申请号：US15744954

申请日：2017-03-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang

IPC: H01L29/78 ,  H01L29/786 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/027 ,  H01L21/425 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66 ,  G02F1/1368

Abstract: The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a channel region, a source electrode contact region, and a drain electrode contact region; an etch stop layer on a side of the channel region distal to the base substrate covering the channel region; a source electrode on a side of the source electrode contact region distal to the base substrate; and a drain electrode on a side of the drain electrode contact region distal to the base substrate. A thickness of the active layer in the source electrode contact region and the drain electrode contact region is substantially the same as a combined thickness of the active layer in the channel region and the etch stop layer.

公开(公告)号：US09373649B2

公开(公告)日：2016-06-21

申请号：US14422342

申请日：2014-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang ,  Ke Wang

IPC: H01L29/10 ,  H01L27/12 ,  G02F1/1343

CPC classification number: H01L27/1248 ,  G02F2001/134372 ,  H01L27/1259 ,  H01L27/1288

Abstract: The invention belongs to the field of display technology, and particularly provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and a thin film transistor and driving electrodes provided on the base substrate, the thin film transistor includes a gate, a gate insulating layer, an active layer, a source and a drain, the driving electrodes include a slit-shaped electrode and a plate-shaped electrode which are located in different layers and at least partially overlap with each other in the orthographic projection direction, the source, the drain and the active layer are formed so that part of their bottom surfaces are located in the same plane, and a resin layer is further provided between the thin film transistor and the plate-shaped electrode.

Abstract translation: 本发明属于显示技术领域，特别是提供阵列基板及其制造方法以及显示装置。 阵列基板包括基底基板和设置在基底基板上的薄膜晶体管和驱动电极，薄膜晶体管包括栅极，栅极绝缘层，有源层，源极和漏极，驱动电极包括 狭缝状电极和板状电极，其位于不同的层中并且在正投影方向上彼此至少部分重叠，源极，漏极和有源层形成为使得它们的底表面的一部分位于 在同一平面内，在薄膜晶体管和板状电极之间进一步设置树脂层。

公开(公告)号：US12237344B2

公开(公告)日：2025-02-25

申请号：US18522510

申请日：2023-11-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Xinhong Lu

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121

Abstract: An OLED display device including a display area is provided. A first and second thin film transistors (TFTs) are arranged in the display area, the first TFT includes a first active layer, the second TFT includes a second active layer, a material of the first active layer is different from that of the second active layer. The OLED display device includes a substrate, the second active layer, a second gate of the second TFT, the first active layer, a first gate of the first TFT, a first source and drain of the first TFT, a second source and drain of the second TFT, a first data line in a same layer as the second source and drain, a first planarization layer on the first data line, and a second data line on the first planarization layer and electrically insulated from the first data line.

公开(公告)号：US12213372B2

公开(公告)日：2025-01-28

申请号：US17732781

申请日：2022-04-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu ,  Tianmin Zhou ,  Xin Yang

IPC: H01L51/00 ,  H10K59/124 ,  H10K59/131 ,  H10K77/10

Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.

公开(公告)号：US20240103328A1

公开(公告)日：2024-03-28

申请号：US17765769

申请日：2021-06-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhen Zhang ,  Fuqiang Li ,  Zhenyu Zhang ,  Yunping Di ,  Lizhong Wang ,  Zheng Fang ,  Jiahui Han ,  Yawei Wang ,  Chenyang Zhang ,  Chengfu Xu ,  Ce Ning ,  Pengxia Liang ,  Feihu Zhou ,  Xianqin Meng ,  Weiting Peng ,  Qiuli Wang ,  Binbin Tong ,  Rui Huang ,  Tianmin Zhou ,  Wei Yang

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/136286 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.