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公开(公告)号:US20120313802A1
公开(公告)日:2012-12-13
申请号:US13492118
申请日:2012-06-08
IPC分类号: H03M1/12
CPC分类号: H03M1/20
摘要: An approach to signal conversion adapts the signal conversion process, for example, by adapting or configuring signal conversion circuitry, according to inferred characteristics (e.g., probability distribution of value) of a signal being converted. As an example, an analog-to-digital converter (ADC) may be adapted so that its accuracy varies across the range of possible input signal values in such a way that on average the digital signal provides a higher accuracy than had the accuracy remained fixed. In another example, models (and corresponding inference circuitry) of both an input signal process and of a quantization process are used to improve signal conversion accuracy.
摘要翻译: 信号转换方法根据被转换信号的推断特性(例如值的概率分布)来适配信号转换过程,例如通过适配或配置信号转换电路。 作为示例,模数转换器(ADC)可以被适配成使得其精度在可能的输入信号值的范围内变化,使得数字信号的平均值提供比准确度保持固定的更高的精度 。 在另一示例中,使用输入信号处理和量化处理两者的模型(和相应的推理电路)来提高信号转换精度。
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公开(公告)号:US08674868B2
公开(公告)日:2014-03-18
申请号:US13492118
申请日:2012-06-08
IPC分类号: H03M1/12
CPC分类号: H03M1/20
摘要: An approach to signal conversion adapts the signal conversion process, for example, by adapting or configuring signal conversion circuitry, according to inferred characteristics (e.g., probability distribution of value) of a signal being converted. As an example, an analog-to-digital converter (ADC) may be adapted so that its accuracy varies across the range of possible input signal values in such a way that on average the digital signal provides a higher accuracy than had the accuracy remained fixed. In another example, models (and corresponding inference circuitry) of both an input signal process and of a quantization process are used to improve signal conversion accuracy.
摘要翻译: 信号转换方法根据被转换信号的推断特性(例如值的概率分布)来适配信号转换过程,例如通过适配或配置信号转换电路。 作为示例,模数转换器(ADC)可以被适配成使得其精度在可能的输入信号值的范围内变化,使得数字信号的平均值提供比准确度保持固定的更高的精度 。 在另一示例中,使用输入信号处理和量化处理两者的模型(和相应的推理电路)来提高信号转换精度。
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公开(公告)号:US08344924B2
公开(公告)日:2013-01-01
申请号:US13095188
申请日:2011-04-27
IPC分类号: H03M1/12
CPC分类号: G06J1/00
摘要: An approach to converting an analog value based on a partition of an input range produces probabilities that the input is found within each of the regions based, for example, on a noisy version of the input. In some examples, iterative and/or pipelined application of comparison circuitry is used to accumulate a set of analog representations of the output probabilities. The circuitry can be adapted or configured according to the characteristics of the degradation (e.g., according to the variance of an additive noise) and/or prior information about the distribution of the clean input (e.g., a distribution over a discrete set of exemplar values, uniformly distributed etc.).
摘要翻译: 基于输入范围的分区来转换模拟值的方法产生在例如基于输入的噪声版本的情况下在每个区域内发现输入的概率。 在一些示例中,使用比较电路的迭代和/或流水线应用来累积输出概率的一组模拟表示。 电路可以根据劣化的特性进行调整或配置(例如,根据加性噪声的变化)和/或关于干净输入分布的先前信息(例如,在离散的一组样本值上的分布 ,均匀分布等)。
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公开(公告)号:US08792602B2
公开(公告)日:2014-07-29
申请号:US13032520
申请日:2011-02-22
CPC分类号: H03M13/6597 , H03M13/1111
摘要: A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
摘要翻译: 处理器实现节点之间的功能节点和通信路径的网络。 处理器包括处理器的功能节点的多个电路实现; 以及实现链接节点的电路实现的通信路径的多个信号路径。 至少一些信号路径被配置为传递根据信号路径上的信号电平的时间模式表示的信号值。 处理器还包括用于在表示为信号电平(例如,电压或电流电平)的信号值和表示为时间模式的信号值之间进行转换的多个电路部件。
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公开(公告)号:US08458114B2
公开(公告)日:2013-06-04
申请号:US12716155
申请日:2010-03-02
CPC分类号: G06N7/005
摘要: Some general aspects relate to systems and methods of analog computation using numerical representation with uncertainty. For example, a specification of a group of variables is accepted, with each variable having a set of at least N possible values. The group of variables satisfies a set of one or more constraints, and each variable is specified as a decomposition into a group of constituents, with each constituent having a set of M (e.g., M
摘要翻译: 一些一般方面涉及使用具有不确定性的数值表示的模拟计算的系统和方法。 例如,接受一组变量的规范,每个变量具有至少N个可能值的集合。 变量组满足一个或多个约束的集合,并且每个变量被指定为分组成一组成分,其中每个组成部分具有一组M(例如,M
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公开(公告)号:US20130094298A1
公开(公告)日:2013-04-18
申请号:US13471816
申请日:2012-05-15
申请人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Ziatkovic
发明人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Ziatkovic
CPC分类号: G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译: 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件,并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出,其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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公开(公告)号:US20100246289A1
公开(公告)日:2010-09-30
申请号:US12537081
申请日:2009-08-06
IPC分类号: G11C7/00
CPC分类号: G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
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公开(公告)号:US09626624B2
公开(公告)日:2017-04-18
申请号:US13187466
申请日:2011-07-20
申请人: Jeffrey Bernstein , Benjamin Vigoda
发明人: Jeffrey Bernstein , Benjamin Vigoda
CPC分类号: G06N5/04 , G06N3/0635
摘要: An inference task is performed using a computation device having a plurality of processing elements operable in parallel and connected via a connectivity system. Performing the task includes accepting at the device a specification of at least part of the inference task. The specification characterizes a plurality of variables and a plurality of factors, each factor being associated with a subset of the variables. Each of the processing elements is configured with data defining one or more of the plurality of factors. At each of the processing elements, computation associated with one of the factors is performed concurrently with other of the processing elements performing computation associated with different ones of the factors. Messages are exchanged via a connectivity system. The messages provide inputs and/or outputs to the processing elements for the computations associated with the factors and provide a result of performing of the at least the part of the inference task.
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公开(公告)号:US08179731B2
公开(公告)日:2012-05-15
申请号:US12537045
申请日:2009-08-06
申请人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
发明人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
IPC分类号: G11C7/00
CPC分类号: G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
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公开(公告)号:US08107306B2
公开(公告)日:2012-01-31
申请号:US12537081
申请日:2009-08-06
申请人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
发明人: Benjamin Vigoda , Eric Nestler , Jeffrey Bernstein , David Reynolds , Alexander Alexeyev , Jeffrey Venuti , William Bradley , Vladimir Zlatkovic
IPC分类号: G11C7/00
CPC分类号: G11C7/00 , G11C7/1006 , G11C7/16 , G11C11/24 , G11C11/5642 , G11C16/04 , G11C27/005 , G11C29/00
摘要: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
摘要翻译: 存储装置包括具有一组存储元件的存储阵列。 每个存储元件可以写入一组离散的物理状态。 读取电路选择一个或多个存储元件,并为每个选定的存储元件生成表示所选存储元件的物理状态的模拟信号。 信号处理电路处理模拟信号以产生多个输出,其中每个输出表示所选择的存储元件与离散的物理状态集合中的一个或多个的不同子集的关联程度。
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