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    Using localized ionizer to reduce electrostatic charge from wafer and mask
    2.
    发明授权
    Using localized ionizer to reduce electrostatic charge from wafer and mask 有权
    使用局部电离器来减少晶片和掩模的静电电荷

    公开(公告)号：US06507474B1

    公开(公告)日：2003-01-14

    申请号：US09597126

    申请日：2000-06-19

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    IPC分类号： H01T2300

    CPC分类号： G03F7/70616 ,  G03F7/70941

    摘要： One aspect of the present invention elates to a method of reducing electrostatic charges on a patterned photoresist to improve evaluation of the developed photoresist, involving the steps of evaluating the patterned photoresist to determine if electrostatic charges exist thereon; positioning an ionizer near the patterned photoresist, the ionizer generating ions thereby reducing the electrostatic charges on the patterned photoresist; and evaluating the patterned photoresist with an electron beam. Another aspect of the present invention relates to a system for reducing electrostatic charges on a patterned photoresist, containing a charge sensor for determining if electrostatic charges exist on the patterned photoresist and measuring the electrostatic charges; an ionizer positioned near the patterned photoresist having electrostatic charges thereon for reducing the electrostatic charges on the patterned photoresist; a controller for setting at least one of time of ion generation and amount of ion generation by the ionizer, the controller coupled to the charge sensor and the ionizer; and a scanning electron microscope or an atomic force microscope for evaluating the patterned photoresist having reduced electrostatic charges thereon with an electron beam.

    摘要翻译： 本发明的一个方面是提供减少图案化光致抗蚀剂上的静电电荷以改进对显影光致抗蚀剂的评估的方法，包括评估图案化光致抗蚀剂以确定静电电荷是否存在于其中的步骤; 在图案化的光致抗蚀剂附近定位电离器，离子发生器产生离子，从而减少图案化光致抗蚀剂上的静电电荷; 并用电子束评估图案化的光致抗蚀剂。 本发明的另一方面涉及一种用于减少图案化光致抗蚀剂上的静电电荷的系统，其包含用于确定图案化光致抗蚀剂上是否存在静电电荷并测量静电电荷的电荷传感器; 位于图案化的光致抗蚀剂附近的电离器，其上具有静电电荷，用于减少图案化光致抗蚀剂上的静电电荷; 用于设置离子发生时间和离子发生量中的至少一个的控制器，耦合到电荷传感器和离子发生器的控制器; 以及扫描电子显微镜或原子力显微镜，用于用电子束评估其上具有降低的静电电荷的图案化光致抗蚀剂。

    Grainless material for calibration sample
    5.
    发明授权
    Grainless material for calibration sample 失效
    用于校准样品的粗糙材料

    公开(公告)号：US06459482B1

    公开(公告)日：2002-10-01

    申请号：US09729294

    申请日：2000-12-04

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Michael K. Templeton ,  Sanjay K. Yedur ,  Bryan K. Choo

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Michael K. Templeton ,  Sanjay K. Yedur ,  Bryan K. Choo

    IPC分类号： G01J110

    CPC分类号： H01J37/28 ,  H01J2237/2826

    摘要： The present invention provides SEM systems, SEM calibration standards, and SEM calibration methods that improved accuracy in critical dimension measurements. The calibration standards have features formed with an amorphous material such as amorphous silicon. Amorphous materials lack the crystal grain structure of materials such as polysilicon and are capable of providing sharper edged features and higher accuracy patterns than grained materials. The amorphous material can be bound to a silicon wafer substrate through an intermediate layer of material, such as silicon dioxide. Where the intermediate layer is insulating material, as is silicon dioxide, the intermediate layer may be patterned with gaps to provide for electrical communication between the amorphous silicon and the silicon wafer. Charges imparted to the amorphous silicon during electron beam scanning may thereby drain to the silicon wafer rather than accumulating to a level where they would distort the electron beam.

    摘要翻译： 本发明提供SEM系统，SEM校准标准和SEM校准方法，提高了临界尺寸测量的精度。 校准标准品具有非晶体材料如非晶硅形成的特征。 无定形材料缺乏诸如多晶硅的材料的晶粒结构，并且能够提供比颗粒材料更尖锐的边缘特征和更高精度的图案。 非晶材料可以通过诸如二氧化硅的材料的中间层与硅晶片衬底结合。 在中间层是绝缘材料的情况下，如二氧化硅那样，中间层可以用间隙图案化以提供非晶硅和硅晶片之间的电连通。 因此，在电子束扫描期间赋予非晶硅的电荷可以从而被排出到硅晶片，而不是积聚到它们会使电子束变形的水平。

    Cleaning chamber built into SEM for plasma or gaseous phase cleaning
    6.
    发明授权
    Cleaning chamber built into SEM for plasma or gaseous phase cleaning 有权
    内置扫描电镜的清洗室进行等离子体或气相清洗

    公开(公告)号：US06190062B1

    公开(公告)日：2001-02-20

    申请号：US09558492

    申请日：2000-04-26

    申请人： Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh ,  Bryan K. Choo ,  Sanjay K. Yedur

    发明人： Ramkumar Subramanian ,  Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh ,  Bryan K. Choo ,  Sanjay K. Yedur

    IPC分类号： G03D1300

    CPC分类号： H01J37/28 ,  H01J2237/2817

    摘要： One aspect of the present invention relates to a method of inspecting a patterned substrate using an SEM, involving the steps of evaluating the patterned substrate to determine if charges exist thereon; introducing the patterned substrate having charges thereon into a processing chamber of the SEM; inspecting the patterned resist using an electron beam generated by the SEM; and introducing a cleaner containing ozone into the processing chamber of the SEM. Another aspect of the present invention relates to a system for processing a patterned substrate, containing a charge sensor for determining if charges exist on the patterned substrate and measuring the charges; a means for contacting the patterned substrate with a cleaner containing ozone to reduce the charges thereon; a controller for setting at least one of time of contact between the patterned substrate and the cleaner, temperature of the cleaner, concentration of ozone in the cleaner, and pressure under which contact between the patterned substrate and the cleaner occurs; and a device for inspecting the patterned substrate with an electron beam.

    摘要翻译： 本发明的一个方面涉及使用SEM检查图案化衬底的方法，包括以下步骤：评估图案化衬底以确定其中是否存在电荷; 将具有电荷的图案化衬底引入到SEM的处理室中; 使用由SEM产生的电子束检查图案化的抗蚀剂; 并将含有臭氧的清洁剂引入SEM的处理室。 本发明的另一方面涉及一种用于处理图案化衬底的系统，其包含用于确定在图案化衬底上是否存在电荷并测量电荷的电荷传感器; 用于使图案化基底与含有臭氧的清洁剂接触以降低其上的电荷的装置; 用于设置图案化基板和清洁器之间的接触时间中的至少一个的控制器，清洁器的温度，清洁器中的臭氧浓度以及图案化基板和清洁器之间的接触发生的压力; 以及用于用电子束检查图案化衬底的装置。

    Electrostatic charge reduction of photoresist pattern on development track
    9.
    发明授权
    Electrostatic charge reduction of photoresist pattern on development track 有权
    光刻胶图案在显影轨上的静电电荷减少

    公开(公告)号：US06479820B1

    公开(公告)日：2002-11-12

    申请号：US09557720

    申请日：2000-04-25

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan ,  Khoi A. Phan ,  Bryan K. Choo

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan ,  Khoi A. Phan ,  Bryan K. Choo

    IPC分类号： G03F730

    CPC分类号： G03F7/40 ,  G03F7/405

    摘要： In one embodiment, the present invention relates to a method of processing a photoresist on a semiconductor structure, involving the steps of exposing and developing the photoresist; evaluating the exposed and developed photoresist to determine if negative charges exist thereon; contacting the exposed and developed photoresist with a positive ion carrier thereby reducing any negative charges thereon; and evaluating the exposed and developed photoresist with an electron beam. In another embodiment, the present invention relates to a system for processing a patterned photoresist on a semiconductor structure, containing a charge sensor for determining if charges exist on the patterned photoresist and measuring the charges; a means for contacting the patterned photoresist with a positive ion carrier to reduce the charges thereon; a controller for setting at least one of time of contact between the patterned photoresist and the positive ion carrier, temperature of the positive ion carrier, concentration of positive ions in the positive ion carrier, and pressure under which contact between the patterned photoresist and the positive ion carrier occurs; and a device for evaluating the patterned photoresist with an electron beam.

    摘要翻译： 在一个实施方案中，本发明涉及一种在半导体结构上处理光致抗蚀剂的方法，包括曝光和显影光致抗蚀剂的步骤; 评估曝光和显影的光致抗蚀剂以确定其上是否存在负电荷; 使曝光和显影的光致抗蚀剂与正离子载体接触，从而减少其上的任何负电荷; 并用电子束评估曝光和显影的光致抗蚀剂。 在另一个实施例中，本发明涉及一种用于处理半导体结构上的图案化光致抗蚀剂的系统，其包含用于确定图案化光致抗蚀剂上是否存在电荷并测量电荷的电荷传感器; 用于使图案化的光致抗蚀剂与正离子载体接触以减少其上的电荷的装置; 控制器，用于设置图案化的光致抗蚀剂和正离子载体之间的接触时间中的至少一个，正离子载体的温度，正离子载体中的正离子的浓度以及图案化的光致抗蚀剂和阳离子的正极之间的接触 发生离子载体; 以及用电子束评估图案化光致抗蚀剂的装置。

    UV-enhanced silylation process to increase etch resistance of ultra thin resists
    10.
    发明授权
    UV-enhanced silylation process to increase etch resistance of ultra thin resists 失效
    UV增强的硅烷化方法，以增加超薄抗蚀剂的耐蚀刻性

    公开(公告)号：US06451512B1

    公开(公告)日：2002-09-17

    申请号：US09565691

    申请日：2000-05-01

    申请人： Bharath Rangarajan ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bhanwar Singh ,  Michael K. Templeton ,  Sanjay K. Yedur ,  Bryan K. Choo

    发明人： Bharath Rangarajan ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bhanwar Singh ,  Michael K. Templeton ,  Sanjay K. Yedur ,  Bryan K. Choo

    IPC分类号： G03F700

    CPC分类号： G03F7/265 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139

    摘要： In one embodiment, the present invention relates to a method of processing an ultrathin resist, involving the steps of depositing the ultra-thin photoresist over a semiconductor substrate, the ultra-thin resist having a thickness less than about 3,000 Å; irradiating the ultra-thin resist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist; and contacting the ultra-thin resist with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist or after developing the ultra-thin resist.

    摘要翻译： 在一个实施方案中，本发明涉及一种处理超薄抗蚀剂的方法，包括以下步骤：在半导体衬底上沉积超薄光致抗蚀剂，超薄抗蚀剂的厚度小于约; 用波长约250nm或更小的电磁辐射照射超薄抗蚀剂; 开发超薄抗蚀剂; 以及在紫外光和臭氧中的至少一种的环境下使超薄抗蚀剂与含硅化合物接触，其中超薄抗蚀剂与含硅化合物的接触在照射和显影超薄抗蚀剂之间进行，或 在开发超薄抗蚀剂后。