公开(公告)号：US07060544B2

公开(公告)日：2006-06-13

申请号：US10317217

申请日：2002-12-12

申请人： Hae-Yeol Kim ,  Jong-Uk Bae ,  Binn Kim

发明人： Hae-Yeol Kim ,  Jong-Uk Bae ,  Binn Kim

IPC分类号： H01L21/283 ,  H01L21/38

CPC分类号： H01L29/78618 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/78675

摘要： A fabricating method of a thin film transistor includes forming an active layer of polycrystalline silicon, forming a first insulating layer on the active layer, forming a gate electrode on the first insulating layer over the active layer, doping side portions of the active layer with impurities, applying a small amount of metal to the side portions of the active layer and activating the side portions of the active layer such that the small amount of metal is adsorbed into the active layer.

摘要翻译： 一种薄膜晶体管的制造方法，包括形成多晶硅的有源层，在有源层上形成第一绝缘层，在有源层上的第一绝缘层上形成栅电极，在有源层的杂质侧掺杂杂质 在有源层的侧面施加少量的金属，使有源层的侧面部分活化，使少量的金属吸附到有源层中。

公开(公告)号：US06849525B2

公开(公告)日：2005-02-01

申请号：US10465786

申请日：2003-06-20

申请人： Binn Kim ,  Hae-Yeol Kim ,  Jong-Uk Bae

发明人： Binn Kim ,  Hae-Yeol Kim ,  Jong-Uk Bae

IPC分类号： C30B1/02 ,  H01L21/20 ,  H01L21/336 ,  H01L29/786 ,  H01L21/30

CPC分类号： H01L21/02672 ,  C30B1/023 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2022 ,  H01L29/66757 ,  H01L29/78675

摘要： A method of forming a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; depositing a catalyst metal on the amorphous silicon layer; disposing first and second electrodes contacting the amorphous silicon layer along a first direction; heating the amorphous silicon layer under a first temperature and simultaneously applying a first voltage to the first and second electrodes to form a first crystallized amorphous silicon layer; disposing third and fourth electrodes contacting the first crystallized amorphous silicon layer along a second direction, the second direction being different from the first direction; and heating the first crystallized amorphous silicon layer under a second temperature and simultaneously applying a second voltage to the third and fourth electrodes to form a secondly crystallized amorphous silicon layer.

摘要翻译： 形成多晶硅层的方法包括：在基板上形成非晶硅层; 在所述非晶硅层上沉积催化剂金属; 沿第一方向布置与非晶硅层接触的第一和第二电极; 在第一温度下加热所述非晶硅层并且同时向所述第一和第二电极施加第一电压以形成第一结晶非晶硅层; 使第三和第四电极沿着第二方向接触第一结晶非晶硅层，第二方向不同于第一方向; 以及在第二温度下加热所述第一结晶非晶硅层并且同时向所述第三和第四电极施加第二电压，以形成第二结晶非晶硅层。

公开(公告)号：US06727122B2

公开(公告)日：2004-04-27

申请号：US10310975

申请日：2002-12-06

申请人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae ,  Hae-Yeol Kim

发明人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae ,  Hae-Yeol Kim

IPC分类号： H01L2184

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78675 ,  Y10S260/35

摘要： A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface of the amorphous silicon layer, crystallizing the amorphous silicon layer having the catalytic metal thereon into a polycrystalline silicon layer, forming an island pattern on the polycrystalline silicon layer, thereby defining an active region underneath in the polycrystalline silicon layer, applying n-type ions to the polycrystalline silicon layer and then heat-treating the polycrystalline silicon layer to remove the catalytic metal from the active region underneath the island pattern, patterning the polycrystalline silicon layer using the island pattern as a mask to form an active layer and to expose a surface of the adjacent buffer layer, removing the island pattern from the active layer using an etchant, and etching the exposed surface of the buffer layer when removing the island pattern.

摘要翻译： 提供一种形成用于薄膜晶体管的多晶硅有源层的方法。 该方法包括在衬底上形成缓冲层，在缓冲层上形成非晶硅层，向非晶硅层的表面施加催化金属，使其上具有催化金属的非晶硅层结晶成多晶硅层， 在所述多晶硅层上形成岛状图案，从而在所述多晶硅层中限定下面的有源区，向所述多晶硅层施加n型离子，然后热处理所述多晶硅层以从所述活性区域除去所述催化金属 在岛状图案之下，使用岛状图案作为掩模来图案化多晶硅层以形成有源层并暴露相邻缓冲层的表面，使用蚀刻剂从活性层除去岛状图案，并蚀刻暴露表面 的去除岛图案时的缓冲层。

公开(公告)号：US07413966B2

公开(公告)日：2008-08-19

申请号：US10310964

申请日：2002-12-06

申请人： Binn Kim ,  Jong-Uk Bae ,  Hae-Yeol Kim

发明人： Binn Kim ,  Jong-Uk Bae ,  Hae-Yeol Kim

IPC分类号： H01L21/20 ,  H01L21/00

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78675 ,  Y10S260/35

摘要： A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface of the amorphous silicon layer, crystallizing the amorphous silicon layer having the catalytic metal thereon into a polycrystalline silicon layer, annealing the polycrystalline silicon layer in an N2 gas atmosphere to stabilize the polycrystalline silicon layer, etching a surface of the polycrystalline silicon layer using an etchant, and patterning the polycrystalline silicon layer to form an island-shaped active layer.

摘要翻译： 提供一种形成用于薄膜晶体管的多晶硅有源层的方法。 该方法包括在衬底上形成缓冲层，在缓冲层上形成非晶硅层，向非晶硅层的表面施加催化金属，使其上具有催化金属的非晶硅层结晶成多晶硅层， 在N 2气体气氛中退火多晶硅层以稳定多晶硅层，使用蚀刻剂蚀刻多晶硅层的表面，并构图多晶硅层以形成岛状活性物质 层。

公开(公告)号：US06841433B2

公开(公告)日：2005-01-11

申请号：US10310965

申请日：2002-12-06

申请人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae

发明人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78675 ,  Y10S260/35

摘要： A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provide. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface of the amorphous silicon layer, crystallizing the amorphous silicon layer having the catalytic metal thereon into a polycrystalline silicon layer, forming an island pattern on the polycrystalline silicon layer, thereby defining an active region underneath in the polycrystalline silicon layer, applying n-type ions to the polycrystalline silicon layer and then heat-treating the polycrystalline silicon layer to remove the catalytic metal from the active region underneath the island pattern, and patterning the polycrystalline silicon layer using the island pattern as a mask to form an active layer.

摘要翻译： 提供一种形成用于薄膜晶体管的多晶硅有源层的方法。 该方法包括在衬底上形成缓冲层，在缓冲层上形成非晶硅层，向非晶硅层的表面施加催化金属，使其上具有催化金属的非晶硅层结晶成多晶硅层， 在所述多晶硅层上形成岛状图案，从而在所述多晶硅层中限定下面的有源区，向所述多晶硅层施加n型离子，然后热处理所述多晶硅层以从所述活性区域除去所述催化金属 在岛状图案下方，并且使用岛状图案作为掩模来构图多晶硅层以形成有源层。

公开(公告)号：US06780693B2

公开(公告)日：2004-08-24

申请号：US10310966

申请日：2002-12-06

申请人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae

发明人： Hyun-Sik Seo ,  Binn Kim ,  Jong-Uk Bae

IPC分类号： H01L2184

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78609 ,  H01L29/78675 ,  Y10S260/35

摘要： A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface of the amorphous silicon layer, crystallizing the amorphous silicon layer having the catalytic metal thereon into a polycrystalline silicon layer, forming an island pattern on the polycrystalline silicon layer, thereby defining an active region underneath in the polycrystalline silicon layer, applying n-type ions to the polycrystalline silicon layer and then heat-treating the polycrystalline silicon layer to remove the catalytic metal from the active region underneath the island pattern, patterning the polycrystalline silicon layer using the island pattern as a mask to form an active layer, doping a small amount of p-type ions into the active layer to adjust a threshold voltage of the then film transistor to be formed using the active layer, and removing the island pattern from the active layer.

摘要翻译： 提供一种形成用于薄膜晶体管的多晶硅有源层的方法。 该方法包括在衬底上形成缓冲层，在缓冲层上形成非晶硅层，向非晶硅层的表面施加催化金属，使其上具有催化金属的非晶硅层结晶成多晶硅层， 在所述多晶硅层上形成岛状图案，从而在所述多晶硅层中限定下面的有源区，向所述多晶硅层施加n型离子，然后热处理所述多晶硅层以从所述活性区域除去所述催化金属 在岛状图案之下，使用岛状图案作为掩模来形成多晶硅层以形成有源层，将少量的p型离子掺杂到有源层中，以使用以下方式调制待形成的膜晶体管的阈值电压： 有源层，并从活性层去除岛状图案。

公开(公告)号：US08324111B2

公开(公告)日：2012-12-04

申请号：US12849405

申请日：2010-08-03

申请人： Jong-Uk Bae ,  Hyun-Sik Seo ,  Im-Kuk Kang

发明人： Jong-Uk Bae ,  Hyun-Sik Seo ,  Im-Kuk Kang

IPC分类号： H01L21/308

CPC分类号： H01L27/1225 ,  H01L27/12 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： Disclosed are a liquid crystal display device employing an amorphous zinc oxide-based semiconductor as an active layer, and a method for fabricating the same, whereby device stability can be secured by employing an etch stopper structure and device characteristics can be enhanced by minimizing exposure and deterioration of the active layer excluding content regions by virtue of the design of the etching stopper in a shape like “H”. Also, the liquid crystal display device and the fabrication method thereof can further form a semiconductor pattern and an insulating layer pattern on the intersection between the gate line and the data line, so as to compensate a stepped portion, thereby preventing an occurrence of short-circuit.

摘要翻译： 公开了一种使用无定形氧化锌基半导体作为有源层的液晶显示装置及其制造方法，由此可以通过使用蚀刻停止结构来确保器件稳定性，并且可以通过最小化曝光和 由于蚀刻停止件的设计，除了内容物区域之外的有源层的劣化是类似于H的形状。另外，液晶显示装置及其制造方法还可以在半导体图案和绝缘层图案之间的交点上形成 栅极线和数据线，以便补偿台阶部分，从而防止发生短路。

公开(公告)号：US08187919B2

公开(公告)日：2012-05-29

申请号：US12548908

申请日：2009-08-27

申请人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

发明人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

IPC分类号： H01L21/336

CPC分类号： H01L29/7869 ,  H01L29/45

摘要： An oxide thin film transistor (TFT) and its fabrication method are disclosed. In a TFT of a bottom gate structure using amorphous zinc oxide (ZnO)-based semiconductor as an active layer, source and drain electrodes are formed, on which the active layer made of oxide semiconductor is formed to thus prevent degeneration of the oxide semiconductor in etching the source and drain electrodes. The oxide TFT includes: a gate electrode form on a substrate; a gate insulating layer formed on the gate electrode; source and drain electrodes formed on the gate insulating layer and having a multi-layer structure of two or more layers; and an active layer formed on the source and drain electrodes and formed of amorphous zinc oxide-based semiconductor, wherein a metal layer such as indium-tin-oxide, molybdenum, and the like, having good ohmic-contact characteristics with titanium and a titanium alloy having good bonding force with oxygen or the oxide-based semiconductor is formed at an uppermost portion of the source and drain electrodes. In a method for fabricating an oxide TFT, a silicon nitride film is deposited with a sputter equipment without the necessity of H2 gas so as to be used as a protection layer of oxide semiconductor to thus prevent degradation of the characteristics of the oxide semiconductor.

摘要翻译： 公开了一种氧化物薄膜晶体管（TFT）及其制造方法。 在使用基于无定形氧化锌（ZnO）的半导体作为有源层的底栅结构的TFT中，形成源极和漏极，形成由氧化物半导体构成的有源层，从而防止氧化物半导体的退化 蚀刻源极和漏极。 氧化物TFT包括：在基板上的栅电极形式; 形成在所述栅电极上的栅极绝缘层; 源电极和漏极形成在栅极绝缘层上并具有两层或多层的多层结构; 以及形成在源极和漏极上并由无定形氧化锌基半导体形成的有源层，其中与钛和钛具有良好的欧姆接触特性的诸如铟锡氧化物，钼等的金属层 在源极和漏极的最上部形成有与氧或氧化物基半导体具有良好结合力的合金。 在制造氧化物TFT的方法中，用溅射设备沉积氮化硅膜，而不需要H2气体，以便用作氧化物半导体的保护层，从而防止氧化物半导体的特性劣化。

公开(公告)号：US20120261660A1

公开(公告)日：2012-10-18

申请号：US13463222

申请日：2012-05-03

申请人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

发明人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L29/7869 ,  H01L29/45

摘要： An oxide thin film transistor (TFT) and its fabrication method are disclosed. In a TFT of a bottom gate structure using amorphous zinc oxide (ZnO)-based semiconductor as an active layer, source and drain electrodes are formed, on which the active layer made of oxide semiconductor is formed to thus prevent degeneration of the oxide semiconductor in etching the source and drain electrodes.

摘要翻译： 公开了一种氧化物薄膜晶体管（TFT）及其制造方法。 在使用基于无定形氧化锌（ZnO）的半导体作为有源层的底栅结构的TFT中，形成源极和漏极，形成由氧化物半导体构成的有源层，从而防止氧化物半导体的退化 蚀刻源极和漏极。

公开(公告)号：US20100210056A1

公开(公告)日：2010-08-19

申请号：US12654585

申请日：2009-12-23

申请人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

发明人： Hyun-Sik Seo ,  Jong-Uk Bae ,  Dae-Hwan Kim

IPC分类号： H01L21/36 ,  H01L33/00

CPC分类号： H01L27/1288 ,  G02F1/136227 ,  H01L21/28525 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/3248 ,  H01L27/3262 ,  H01L29/7869

摘要： A method of fabricating an array substrate for a display device includes steps of forming a gate line and a gate electrode on a substrate, forming a gate insulating layer and an intrinsic amorphous silicon layer, forming an oxide semiconductor layer, increasing a conductive property of the oxide semiconductor layer, forming a metal layer, forming a first photoresist pattern and a second photoresist pattern having a thinner thickness than the first photoresist pattern, forming a data line, a source drain pattern, an oxide semiconductor pattern and an active layer, removing the second photoresist pattern and exposing the source drain pattern, wet-etching the source drain pattern using a first etchant, thereby forming source and drain electrodes, wet-etching the oxide semiconductor pattern using a second etchant, thereby forming ohmic contact layers, removing the first photoresist pattern, forming a passivation layer having a drain contact hole exposing the drain electrode on the source and drain electrodes, and forming a pixel electrode connected to the drain electrode through the drain contact hole, wherein the active layer has a uniform thickness in the switching region.

摘要翻译： 一种制造用于显示装置的阵列基板的方法包括以下步骤：在基板上形成栅极线和栅电极，形成栅极绝缘层和本征非晶硅层，形成氧化物半导体层，增加导电性能 氧化物半导体层，形成金属层，形成厚度比第一光致抗蚀剂图案薄的第一光致抗蚀剂图案和第二光致抗蚀剂图案，形成数据线，源漏图案，氧化物半导体图案和有源层， 第二光致抗蚀剂图案并暴露源极漏极图案，使用第一蚀刻剂湿蚀刻源漏极图案，从而形成源极和漏极，使用第二蚀刻剂湿蚀刻氧化物半导体图案，从而形成欧姆接触层，去除第一 形成具有漏极接触孔的钝化层，所述漏极接触孔暴露出源极a上的漏电极 并且通过漏极接触孔形成连接到漏电极的像素电极，其中有源层在开关区域中具有均匀的厚度。