Functional pathway configuration at a system/IC interface
    1.
    发明授权
    Functional pathway configuration at a system/IC interface 失效
    功能通道在系统/ IC接口配置

    公开(公告)号:US06552567B1

    公开(公告)日:2003-04-22

    申请号:US09964664

    申请日:2001-09-28

    IPC分类号: H03K190175

    CPC分类号: G06F15/76

    摘要: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between one or more semiconductor integrated circuit dice, including an IC package and the circuitry of a system wherein the integrated circuit dice is a digital signal controller. Even more particularly, the present invention relates to a 18, 28, 40, 44, 64 or 80 pin functional pathway configuration for the interface between the digital signal controller and the system in which it is embedded.

    摘要翻译: 本发明一般涉及集成电路(IC)与IC连接的电路组件之间的接口上的功能通路配置。 更具体地说,本发明一般涉及包括IC封装的一个或多个半导体集成电路管芯与系统的电路之间的界面处的功能通路配置,其中集成电路管芯是数字信号控制器。 更具体地,本发明涉及用于数字信号控制器和嵌入其中的系统之间的接口的18,28,40,44,64或80引脚功能通路配置。

    EXTENDING PULSE WIDTH MODULATION PHASE OFFSET
    2.
    发明申请
    EXTENDING PULSE WIDTH MODULATION PHASE OFFSET 有权
    扩展脉冲宽度调制相位偏移

    公开(公告)号:US20130082794A1

    公开(公告)日:2013-04-04

    申请号:US13248571

    申请日:2011-09-29

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03K7/08 H03K7/10

    CPC分类号: H03K7/08

    摘要: Extending pulse width modulation phase offset when generating phase shifted groups of pulse width modulation (PWM) signals is accomplished with a separate phase counter that is independent of the time-base counters used in traditional PWM generation circuits and that is prevented from being retriggered until an existing duty cycle has completed. This is accomplished with a phase offset counter, a phase comparator and a circuit that is triggered via a master time base for overall synchronization of the multi-phase PWM signal generation.

    摘要翻译: 当产生脉冲宽度调制(PWM)信号的相移组时,延长脉冲宽度调制相位偏移是通过独立于传统PWM生成电路中使用的时基计数器的单独的相位计数器实现的,并且被阻止被重新触发直到 现有的工作周期已经完成。 这是通过相位偏移计数器,相位比较器和经由主时基触发的用于多相PWM信号生成的总体同步的电路来实现的。

    Pulse Width Modulation Dead Time Compensation Method and Apparatus
    3.
    发明申请
    Pulse Width Modulation Dead Time Compensation Method and Apparatus 有权
    脉宽调制死区补偿方法及装置

    公开(公告)号:US20090278621A1

    公开(公告)日:2009-11-12

    申请号:US12116468

    申请日:2008-05-07

    IPC分类号: H03K7/08

    CPC分类号: H03K7/08 H02M1/38 H03K5/1515

    摘要: Dead time compensated complementary pulse width modulation (PWM) signals are derived from a PWM generator by first applying time period compensation to the PWM generator signal based upon the direction of current flow in an inductive load being controlled by the PWM generator. Dead time is then applied to the compensated PWM generator signal for producing complementary dead time compensated PWM signals for controlling power switching circuits driving the inductive load.

    摘要翻译: 基于在由PWM发生器控制的感性负载中的电流流动的方向,首先对PWM发生器信号施加时间周期补偿,从PWM发生器得到死区补偿互补脉宽调制(PWM)信号。 然后将死时间施加到补偿的PWM发生器信号,以产生用于控制驱动感性负载的功率开关电路的互补死区补偿PWM信号。

    Apparatus and method for generating multi-phase pulse width modulation (PWM) and sharing a common (master) duty cycle value among a plurality of PWM generators
    4.
    发明授权
    Apparatus and method for generating multi-phase pulse width modulation (PWM) and sharing a common (master) duty cycle value among a plurality of PWM generators 有权
    用于产生多相脉宽调制(PWM)并在多个PWM发生器中共享公共(主)占空比值的装置和方法

    公开(公告)号:US07508899B2

    公开(公告)日:2009-03-24

    申请号:US12049400

    申请日:2008-03-17

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03D3/24 H03M5/06

    CPC分类号: H03K7/08

    摘要: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

    摘要翻译: 脉宽调制(PWM)发生器具有非常高的速度和高分辨率能力,能够产生标准互补PWM,推挽PWM,可变偏移PWM,多相PWM,限流PWM,电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换(ADC)模块的自动触发。 应用包括控制开关电源,其需要非常高的速度操作以在高开关频率下获得高分辨率,以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比,可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器,以减少数字处理器的工作负载。

    Integrated circuit device having at least one of a plurality of bond pads with a selectable plurality of input-output functionalities
    5.
    发明授权
    Integrated circuit device having at least one of a plurality of bond pads with a selectable plurality of input-output functionalities 有权
    集成电路装置具有具有可选择的多个输入 - 输出功能的多个接合焊盘中的至少一个

    公开(公告)号:US07436207B2

    公开(公告)日:2008-10-14

    申请号:US11670771

    申请日:2007-02-02

    IPC分类号: G06F7/38

    CPC分类号: G06F13/4072 G06F13/4022

    摘要: An integrated circuit device having at least one bond pad is coupled to a selectable plurality of input-output functionalities, e.g., an oscillator input, an analog input, an analog output, a digital input and a digital output. These analog, digital and oscillator functionalities may selectably share the same integrated circuit package external connection.

    摘要翻译: 具有至少一个接合焊盘的集成电路器件被耦合到可选择的多个输入输出功能,例如振荡器输入,模拟输入,模拟输出,数字输入和数字输出。 这些模拟,数字和振荡器功能可以选择性地共享相同的集成电路封装外部连接。

    Intelligent Power Control Peripheral
    6.
    发明申请
    Intelligent Power Control Peripheral 审中-公开
    智能功率控制外设

    公开(公告)号:US20080238750A1

    公开(公告)日:2008-10-02

    申请号:US11693239

    申请日:2007-03-29

    IPC分类号: H03M1/12

    摘要: An intelligent power control peripheral (IPCP) may facilitate communications among individual peripherals independent from a digital processor. The IPCP is a “Meta-Peripheral” that may incorporate a configurable inter-peripheral module communications network with digital pulse width modulation (PWM) generators and timing logic therefore, at least one ADC, analog comparators and at least one DAC that may be configured to provide an automatic power control structure that may also provide automatic digital processor/DSP task and workload scheduling for applications such as switch mode power supply (SMPS), brushed motor, etc. This Meta-Peripheral may further use a configurable control fabric in combination with the aforementioned specialized peripherals for the utmost in control configuration flexibility.

    摘要翻译: 智能功率控制外设(IPCP)可以促进独立于数字处理器的各个外围设备之间的通信。 IPCP是“元外设”,可以结合具有数字脉宽调制(PWM)发生器和定时逻辑的可配置的外围设备模块通信网络,至少一个ADC,模拟比较器和至少一个可配置的DAC 提供自动功率控制结构,其还可以为诸如开关模式电源(SMPS),有刷电动机等的应用提供自动数字处理器/ DSP任务和工作量调度。该元周边还可以组合地使用可配置的控制结构 与上述专用外设最大限度地控制配置灵活性。

    Method for Coordinating Triggering of Analog-to-Digital Conversions Relative to Pulse Width Modulation Cycle Timing
    7.
    发明申请
    Method for Coordinating Triggering of Analog-to-Digital Conversions Relative to Pulse Width Modulation Cycle Timing 有权
    用于协调相对于脉冲宽度调制周期时序的模数转换触发的方法

    公开(公告)号:US20080181293A1

    公开(公告)日:2008-07-31

    申请号:US12049415

    申请日:2008-03-17

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03K7/08

    CPC分类号: H03K7/08

    摘要: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

    摘要翻译: 脉宽调制(PWM)发生器具有非常高的速度和高分辨率能力,能够产生标准互补PWM,推挽PWM,可变偏移PWM,多相PWM,限流PWM,电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换(ADC)模块的自动触发。 应用包括控制开关电源,其需要非常高的速度操作以在高开关频率下获得高分辨率,以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比,可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器,以减少数字处理器的工作负载。

    Apparatus for Higher Resolution Pulse Width Modulation Duty Cycle
    8.
    发明申请
    Apparatus for Higher Resolution Pulse Width Modulation Duty Cycle 有权
    高分辨率脉宽调制占空比的装置

    公开(公告)号:US20080159379A1

    公开(公告)日:2008-07-03

    申请号:US12049402

    申请日:2008-03-17

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03K7/08

    CPC分类号: H03K7/08

    摘要: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

    摘要翻译: 脉宽调制(PWM)发生器具有非常高的速度和高分辨率能力,能够产生标准互补PWM,推挽PWM,可变偏移PWM,多相PWM,限流PWM,电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换(ADC)模块的自动触发。 应用包括控制开关电源,其需要非常高的速度操作以在高开关频率下获得高分辨率,以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比,可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器,以减少数字处理器的工作负载。

    Variable frequency ratiometric multiphase pulse width modulation generation
    9.
    发明授权
    Variable frequency ratiometric multiphase pulse width modulation generation 有权
    可变频率比较多相脉宽调制生成

    公开(公告)号:US08638151B2

    公开(公告)日:2014-01-28

    申请号:US13248271

    申请日:2011-09-29

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03K3/017

    CPC分类号: H03K7/08 G06F1/04 G06F1/26

    摘要: Groups of phase shifted Pulse Width Modulation (PWM) signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to greatly simplify and reduce the computational workload for a processor used in a PWM system. The groups of phase shifted PWM signals may also be synchronized with and automatically scaled to match external synchronization signals.

    摘要翻译: 产生相移脉冲宽度调制(PWM)信号组,其维持其占空比和相位关系作为PWM信号频率的周期的函数。 以比例度量方式生成多相PWM信号,以便大大简化并减少PWM系统中使用的处理器的计算工作量。 相移PWM信号组也可以与外部同步信号同步并自动缩放。

    Repetitive single cycle pulse width modulation generation
    10.
    发明授权
    Repetitive single cycle pulse width modulation generation 有权
    重复单周期脉冲宽度调制生成

    公开(公告)号:US08558632B2

    公开(公告)日:2013-10-15

    申请号:US13248328

    申请日:2011-09-29

    申请人: Bryan Kris

    发明人: Bryan Kris

    IPC分类号: H03K3/017

    CPC分类号: H03K7/08

    摘要: Multiple pulse width modulation (PWM) generators each have a separate phase offset counter creating a phase shift. The phase shifting process is separated from the duty cycle generation process, thereby easing the task of preserving the duty cycle and phase relationships among the various PWM channels following an asynchronous external synchronization event. A master time base generates a PWM cycle start signal that resets the phase offset counters in each of the PWM generator circuits. The phase offset counter continues counting until it matches the respective phase offset value. Then, the associated duty cycle counter is reset and restarted. The duty cycle continues until its count matches the specified value at which time the duty cycle counter stops until reset by the terminal count from the phase offset counter. The output of the duty cycle comparators provide the output PWM signals as a repetitive series of single cycle PWM signals.

    摘要翻译: 多个脉冲宽度调制(PWM)发生器各自具有产生相移的单独的相位偏移计数器。 相移过程与占空比生成处理分离,从而缓解了在异步外部同步事件之后保持各种PWM信道之间的占空比和相位关系的任务。 主时基产生一个PWM周期开始信号,复位每个PWM发生器电路中的相位偏移计数器。 相位偏移计数器继续计数,直到它与相应的相位偏移值相匹配。 然后,相关的占空比计数器复位并重新启动。 占空比继续,直到其计数与指定值匹配,此时占空比计数器停止,直到来自相位偏移计数器的端子计数复位。 占空比比较器的输出提供输出PWM信号作为单周期PWM信号的重复系列。