Adaptive harmonic distortion suppression in an amplifier utilizing negative gain
    1.
    发明授权
    Adaptive harmonic distortion suppression in an amplifier utilizing negative gain 有权
    利用负增益的放大器中的自适应谐波失真抑制

    公开(公告)号:US09136797B2

    公开(公告)日:2015-09-15

    申请号:US14042274

    申请日:2013-09-30

    CPC classification number: H03F1/3205 H03F1/3211 H03F1/3241 Y10T29/49016

    Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

    Abstract translation: 这里描述了利用负增益自适应地抑制放大器中的谐波失真的技术。 放大器包括并联耦合的第一放大级和第二放大级。 第一个放大器级具有正增益。 第二放大器级具有负增益以抑制包括放大器的系统的总谐波失真。 放大器还包括耦合到第一放大器级和第二放大器级的并联峰值电路,以增加放大器能够操作的最大工作频率。

    ADAPTIVE HARMONIC DISTORTION SUPPRESSION IN AN AMPLIFIER UTILIZING NEGATIVE GAIN
    2.
    发明申请
    ADAPTIVE HARMONIC DISTORTION SUPPRESSION IN AN AMPLIFIER UTILIZING NEGATIVE GAIN 有权
    使用负增益的放大器中的自适应谐波失真抑制

    公开(公告)号:US20150008982A1

    公开(公告)日:2015-01-08

    申请号:US14042274

    申请日:2013-09-30

    CPC classification number: H03F1/3205 H03F1/3211 H03F1/3241 Y10T29/49016

    Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

    Abstract translation: 这里描述了利用负增益自适应地抑制放大器中的谐波失真的技术。 放大器包括并联耦合的第一放大级和第二放大级。 第一个放大器级具有正增益。 第二放大器级具有负增益以抑制包括放大器的系统的总谐波失真。 放大器还包括耦合到第一放大器级和第二放大器级的并联峰值电路,以增加放大器能够操作的最大工作频率。

    Multilane SERDES clock and data skew alignment for multi-standard support
    3.
    发明授权
    Multilane SERDES clock and data skew alignment for multi-standard support 有权
    多晶硅SERDES时钟和数据偏移对齐,适用于多标准支持

    公开(公告)号:US09100167B2

    公开(公告)日:2015-08-04

    申请号:US13691482

    申请日:2012-11-30

    CPC classification number: H04L7/0025 G06F1/10 G06F1/3203 H04L7/033 H04L25/14

    Abstract: A communication system may include a number of communication channels operating in accordance with one or more communication standards. The channels may generate data clocks from one or more master clock signals. The phase of the data clocks may be aligned using phase detectors for determining respective phase relationships and using phase interpolators for adjusting respective clock phases. The communication system may include communication channels that operate at different data clock frequencies. These systems may divide their respective data clocks in order to achieve a common clock frequency for use in their phase alignment. The phase detectors and associated circuitry may be disabled to save power when not in use.

    Abstract translation: 通信系统可以包括根据一个或多个通信标准操作的多个通信信道。 通道可以从一个或多个主时钟信号产生数据时钟。 可以使用相位检测器对数据时钟的相位进行校准,以确定各个相位关系,并使用相位内插器来调整各个时钟相位。 通信系统可以包括在不同数据时钟频率下操作的通信信道。 这些系统可以对它们各自的数据时钟进行分频,以实现用于其相位对准的公共时钟频率。 可以禁用相位检测器和相关电路,以在不使用时节省电力。

    MULTILANE SERDES CLOCK AND DATA SKEW ALIGNMENT FOR MULTI-STANDARD SUPPORT
    4.
    发明申请
    MULTILANE SERDES CLOCK AND DATA SKEW ALIGNMENT FOR MULTI-STANDARD SUPPORT 有权
    MULTILANE SERDES时钟和数据轴对齐多标准支持

    公开(公告)号:US20140153680A1

    公开(公告)日:2014-06-05

    申请号:US13691482

    申请日:2012-11-30

    CPC classification number: H04L7/0025 G06F1/10 G06F1/3203 H04L7/033 H04L25/14

    Abstract: A communication system may include a number of communication channels operating in accordance with one or more communication standards. The channels may generate data clocks from one or more master clock signals. The phase of the data clocks may be aligned using phase detectors for determining respective phase relationships and using phase interpolators for adjusting respective clock phases. The communication system may include communication channels that operate at different data clock frequencies. These systems may divide their respective data clocks in order to achieve a common clock frequency for use in their phase alignment. The phase detectors and associated circuitry may be disabled to save power when not in use.

    Abstract translation: 通信系统可以包括根据一个或多个通信标准操作的多个通信信道。 通道可以从一个或多个主时钟信号产生数据时钟。 可以使用相位检测器对数据时钟的相位进行校准,以确定各个相位关系,并使用相位内插器来调整各个时钟相位。 通信系统可以包括在不同数据时钟频率下操作的通信信道。 这些系统可以对它们各自的数据时钟进行分频,以实现用于其相位对准的公共时钟频率。 可以禁用相位检测器和相关电路,以在不使用时节省电力。

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