公开(公告)号：US07548139B2

公开(公告)日：2009-06-16

申请号：US11455190

申请日：2006-06-19

申请人： Hao-seok Park ,  Joo-ho Lee ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

发明人： Hao-seok Park ,  Joo-ho Lee ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

IPC分类号： H03H9/17 ,  H03H9/00

CPC分类号： H03H9/584 ,  H03H3/04 ,  H03H9/587 ,  H03H9/588

摘要： A coupled resonator filter and a method of fabricating the coupled resonator filter are provided. The method includes: sequentially stacking a first electrode, a first piezoelectric layer, a second electrode, an insulating layer, a third electrode, a second piezoelectric layer, and a fourth electrode on a surface of a substrate; sequentially patterning the first electrode, the first piezoelectric layer, the second electrode, the insulating layer, the third electrode, the second piezoelectric layer, and the fourth electrode to expose areas of the first, second, and third electrodes; forming a plurality of connection electrodes respectively connected to the exposed areas of the first, second, and third electrodes and an area of the fourth electrode; and etching an area of the substrate underneath the first electrode to form an air gap.

摘要翻译： 提供耦合谐振滤波器和制造耦合谐振滤波器的方法。 该方法包括：在基板的表面上依次堆叠第一电极，第一压电层，第二电极，绝缘层，第三电极，第二压电层和第四电极; 顺序地构图第一电极，第一压电层，第二电极，绝缘层，第三电极，第二压电层和第四电极，以暴露第一，第二和第三电极的区域; 形成分别连接到第一，第二和第三电极的暴露区域和第四电极的区域的多个连接电极; 并且蚀刻在第一电极下方的衬底的区域以形成气隙。

公开(公告)号：US20070139139A1

公开(公告)日：2007-06-21

申请号：US11455190

申请日：2006-06-19

申请人： Hao-seok Park ,  Joo-ho Lee ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

发明人： Hao-seok Park ,  Joo-ho Lee ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

IPC分类号： H03H9/54

CPC分类号： H03H9/584 ,  H03H3/04 ,  H03H9/587 ,  H03H9/588

摘要： A coupled resonator filter and a method of fabricating the coupled resonator filter are provided. The method includes: sequentially stacking a first electrode, a first piezoelectric layer, a second electrode, an insulating layer, a third electrode, a second piezoelectric layer, and a fourth electrode on a surface of a substrate; sequentially patterning the first electrode, the first piezoelectric layer, the second electrode, the insulating layer, the third electrode, the second piezoelectric layer, and the fourth electrode to expose areas of the first, second, and third electrodes; forming a plurality of connection electrodes respectively connected to the exposed areas of the first, second, and third electrodes and an area of the fourth electrode; and etching an area of the substrate underneath the first electrode to form an air gap.

摘要翻译： 提供耦合谐振滤波器和制造耦合谐振滤波器的方法。 该方法包括：在基板的表面上依次堆叠第一电极，第一压电层，第二电极，绝缘层，第三电极，第二压电层和第四电极; 顺序地构图第一电极，第一压电层，第二电极，绝缘层，第三电极，第二压电层和第四电极，以暴露第一，第二和第三电极的区域; 形成分别连接到第一，第二和第三电极的暴露区域和第四电极的区域的多个连接电极; 并且蚀刻在第一电极下方的衬底的区域以形成气隙。

公开(公告)号：US07615842B2

公开(公告)日：2009-11-10

申请号：US11473079

申请日：2006-06-23

申请人： Joo-ho Lee ,  Hae-seok Park ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

发明人： Joo-ho Lee ,  Hae-seok Park ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

IPC分类号： H01L29/00

CPC分类号： H03H9/0542 ,  H03H9/105

摘要： An inductor integrated chip and fabrication method thereof is provided. The inductor integrated chip includes a wafer; an inductor bonded on a surface of the wafer; a circuit element formed on the surface of the wafer and coupled to a first end of the inductor; a packaging wafer connected to the surface of the wafer and packaging the inductor and the circuit element; and a connecting electrode formed on the packaging wafer and connected to a second end of the inductor. The method includes forming an inductor and a circuit element on a surface of a wafer, wherein the circuit element is coupled to a first end of the inductor; forming a connecting electrode on a packaging wafer; and packaging the inductor and the circuit element by joining the wafer and the packaging wafer so as to connect the connecting electrode with a second end of the inductor.

摘要翻译： 提供一种电感器集成芯片及其制造方法。 电感器集成芯片包括晶片; 结合在晶片表面上的电感器; 电路元件，其形成在所述晶片的表面上并且耦合到所述电感器的第一端; 连接到晶片表面并封装电感器和电路元件的封装晶片; 以及形成在封装晶片上并连接到电感器的第二端的连接电极。 该方法包括在晶片的表面上形成电感器和电路元件，其中电路元件耦合到电感器的第一端; 在封装晶片上形成连接电极; 并且通过接合晶片和封装晶片来封装电感器和电路元件，以将连接电极与电感器的第二端连接。

公开(公告)号：US07619492B2

公开(公告)日：2009-11-17

申请号：US11324303

申请日：2006-01-04

申请人： Byeoung-ju Ha ,  Seog-woo Hong ,  In-sang Song ,  Hyung Choi

发明人： Byeoung-ju Ha ,  Seog-woo Hong ,  In-sang Song ,  Hyung Choi

IPC分类号： H03H9/54 ,  H01L41/22

CPC分类号： H03H3/02 ,  H03H9/174 ,  Y10T29/42

摘要： A film bulk acoustic resonator (FBAR) including a substrate having an etched air gap therethrough; a resonance part having a first electrode, a piezoelectric film and a second electrode which are laminated in turn above the air gap; and an etching resistance layer disposed between the air gap and the resonance part to limit an etching depth in forming the air gap, thereby preventing damage to the resonance part.

摘要翻译： 一种薄膜体声波谐振器（FBAR），包括具有穿过其中的蚀刻气隙的基板; 具有第一电极，压电膜和第二电极的共振部分，其依次层叠在气隙上方; 以及设置在气隙和谐振部件之间的耐蚀刻层，以限制形成气隙的蚀刻深度，从而防止对共振部件的损坏。

公开(公告)号：US20070138594A1

公开(公告)日：2007-06-21

申请号：US11473079

申请日：2006-06-23

申请人： Joo-ho Lee ,  Hae-seok Park ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

发明人： Joo-ho Lee ,  Hae-seok Park ,  Byeoung-ju Ha ,  Seog-woo Hong ,  Hyung Choi ,  In-sang Song

IPC分类号： H01L29/00

CPC分类号： H03H9/0542 ,  H03H9/105

摘要： An inductor integrated chip and fabrication method thereof is provided. The inductor integrated chip includes a wafer; an inductor bonded on a surface of the wafer; a circuit element formed on the surface of the wafer and coupled to a first end of the inductor; a packaging wafer connected to the surface of the wafer and packaging the inductor and the circuit element; and a connecting electrode formed on the packaging wafer and connected to a second end of the inductor. The method includes forming an inductor and a circuit element on a surface of a wafer, wherein the circuit element is coupled to a first end of the inductor; forming a connecting electrode on a packaging wafer; and packaging the inductor and the circuit element by joining the wafer and the packaging wafer so as to connect the connecting electrode with a second end of the inductor.

摘要翻译： 提供一种电感器集成芯片及其制造方法。 电感器集成芯片包括晶片; 结合在晶片表面上的电感器; 电路元件，其形成在所述晶片的表面上并且耦合到所述电感器的第一端; 连接到晶片表面并封装电感器和电路元件的封装晶片; 以及形成在封装晶片上并连接到电感器的第二端的连接电极。 该方法包括在晶片的表面上形成电感器和电路元件，其中电路元件耦合到电感器的第一端; 在封装晶片上形成连接电极; 并且通过接合晶片和封装晶片来封装电感器和电路元件，以将连接电极与电感器的第二端连接。

公开(公告)号：US20060170520A1

公开(公告)日：2006-08-03

申请号：US11324303

申请日：2006-01-04

申请人： Byeoung-ju Ha ,  Seog-woo Hong ,  In-sang Song ,  Hyung Choi

发明人： Byeoung-ju Ha ,  Seog-woo Hong ,  In-sang Song ,  Hyung Choi

IPC分类号： H03H9/54

CPC分类号： H03H3/02 ,  H03H9/174 ,  Y10T29/42

摘要： A film bulk acoustic resonator (FBAR) including a substrate having an etched air gap therethrough; a resonance part having a first electrode, a piezoelectric film and a second electrode which are laminated in turn above the air gap; and an etching resistance layer disposed between the air gap and the resonance part to limit an etching depth in forming the air gap, thereby preventing damage to the resonance part.

公开(公告)号：US07084073B2

公开(公告)日：2006-08-01

申请号：US10681217

申请日：2003-10-09

申请人： Moon-chul Lee ,  Hyung Choi ,  Kyu-dong Jung ,  Mi Jang ,  Seog-woo Hong ,  Seok-whan Chung ,  Chan-bong Jun ,  Seok-jin Kang

发明人： Moon-chul Lee ,  Hyung Choi ,  Kyu-dong Jung ,  Mi Jang ,  Seog-woo Hong ,  Seok-whan Chung ,  Chan-bong Jun ,  Seok-jin Kang

IPC分类号： H01L21/302

CPC分类号： B81C1/00087 ,  H01L21/486 ,  H01L23/13 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a via hole through a glass wafer includes depositing a material layer on an outer surface of the glass wafer, the material layer having a selection ratio higher than that of the glass wafer, forming a via-patterned portion on one side of the material layer, performing a first etching in which the via-patterned portion is etched to form a preliminary via hole, eliminating any remaining patterning material used in the formation of the via-patterned portion, performing a second etching in which the preliminary via hole is etched to form a via hole having a smooth surface and extending through the glass wafer, and eliminating the material layer. The method according to the present invention is able to form a via hole through a glass wafer without allowing formation of an undercut or minute cracks, thereby increasing the yield and reliability of MEMS elements.

摘要翻译： 通过玻璃晶片形成通孔的方法包括在玻璃晶片的外表面上沉积材料层，该材料层的选择比率高于玻璃晶片的选择比，在玻璃晶片的一侧上形成通孔图案部分 所述材料层进行蚀刻所述通路图案部分以形成预备通孔的第一蚀刻，消除在形成所述通路图案部分中使用的剩余图案材料，进行第二蚀刻，其中所述预通孔 被蚀刻以形成具有光滑表面并延伸穿过玻璃晶片的通孔，并且消除材料层。 根据本发明的方法能够通过玻璃晶片形成通孔，而不会形成底切或微小的裂缝，从而提高MEMS元件的成品率和可靠性。

公开(公告)号：US07172916B2

公开(公告)日：2007-02-06

申请号：US10701552

申请日：2003-11-06

申请人： Kyu-dong Jung ,  Chan-Bong Jun ,  Hyung Choi ,  Seok-jin Kang ,  Seog-woo Hong ,  Seok-whan Chung ,  Moon-chul Lee ,  Eun-sung Lee

发明人： Kyu-dong Jung ,  Chan-Bong Jun ,  Hyung Choi ,  Seok-jin Kang ,  Seog-woo Hong ,  Seok-whan Chung ,  Moon-chul Lee ,  Eun-sung Lee

IPC分类号： H01L21/00

CPC分类号： B81C1/00285

摘要： A method and apparatus for vacuum-mounting at least one micro electro mechanical system (MEMS) on a substrate includes a gas injecting section for injecting an inert gas into a vacuum chamber; a substrate aligning section for aligning a semiconductor substrate and a cover, the cover having a cavity formed therein and a getter attached to an interior surface of the cavity; a bonding section for bonding the semiconductor substrate and the cover together; and a controlling section for controlling the substrate aligning section to align the semiconductor and the cover, for controlling the gas injecting section to inject the inert gas into the vacuum chamber, and for controlling the bonding section to bond the semiconductor substrate and the cover together after the inert gas is injected.

摘要翻译： 用于真空安装至少一个微机电系统（MEMS）在基板上的方法和装置包括用于将惰性气体注入真空室的气体注入部分; 用于对准半导体衬底和盖的衬底对准部分，所述盖具有形成在其中的空腔和附着到腔的内表面的吸气剂; 用于将半导体衬底和盖结合在一起的接合部分; 以及控制部分，用于控制衬底对准部分以对准半导体和盖子，用于控制气体注入部分以将惰性气体注入真空室中，并且用于控制接合部分将半导体衬底和盖子结合在一起，之后 注入惰性气体。

公开(公告)号：US07612428B2

公开(公告)日：2009-11-03

申请号：US11291894

申请日：2005-12-02

申请人： Hae-seok Park ,  In-sang Song ,  Hyung Choi

发明人： Hae-seok Park ,  In-sang Song ,  Hyung Choi

IPC分类号： H01L29/00

CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F41/041 ,  H01F2017/0046 ,  H01L21/764 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： An inductor fabricated with a dry film resist and a cavity and a method of fabricating the inductor. The cavity can be formed in a substrate to minimize a parasitic capacitance generated by structures of upper electrodes, an insulating layer, and a lower electrode and minimize energy loss caused by an eddy current generated through the substrate. Also, a process of forming and planarizing the cavity can be simplified so as to form the cavity to a sufficient depth. As a result, an inductor having a high quality factor and a high self resonant frequency can be fabricated. Also, a scheme for simply forming and planarizing a cavity is contemplated.

摘要翻译： 用干膜抗蚀剂和空腔制造的电感器和制造电感器的方法。 空腔可以形成在衬底中以最小化由上电极，绝缘层和下电极的结构产生的寄生电容，并且使由通过衬底产生的涡流引起的能量损失最小化。 此外，可以简化形成和平坦化空腔的过程，以便将空腔形成为足够的深度。 结果，可以制造具有高品质因数和高自谐振频率的电感器。 此外，可以想到简单地形成和平坦化空腔的方案。

公开(公告)号：US07257307B2

公开(公告)日：2007-08-14

申请号：US11471511

申请日：2006-06-21

申请人： Che-heung Kim ,  Hyung Choi ,  In-sang Song ,  Sang-hun Lee ,  Sang-wook Kwon

发明人： Che-heung Kim ,  Hyung Choi ,  In-sang Song ,  Sang-hun Lee ,  Sang-wook Kwon

IPC分类号： G02B6/00

CPC分类号： H01H59/0009 ,  H01H1/20

摘要： A MEMS (micro electro mechanical system) switch, which includes a substrate; a fixed electrode formed on an upper side of the substrate; a signal line formed on both sides of the fixed electrode; a contact member formed on an upper side of the signal line at a distance from said fixed electrode and contacting an edging portion of the signal line; a supporting member supporting the contact member to be movable; and a moving electrode disposed on an upper side of the supporting member.

摘要翻译： MEMS（微机电系统）开关，其包括基板; 固定电极，形成在所述基板的上侧; 形成在固定电极两侧的信号线; 接触构件，形成在距离所述固定电极一定距离的信号线的上侧，并与信号线的边缘部分接触; 支撑构件，其支撑所述接触构件以可移动; 以及设置在所述支撑构件的上侧的移动电极。