公开(公告)号：US20100133586A1

公开(公告)日：2010-06-03

申请号：US12463011

申请日：2009-05-08

申请人： Byoung-Gue MIN ,  Jong-Min Lee ,  Seong-II Kim ,  Kyung-Ho Lee ,  Hyung-Sup Yoon ,  Eun-Soo Nam

发明人： Byoung-Gue MIN ,  Jong-Min Lee ,  Seong-II Kim ,  Kyung-Ho Lee ,  Hyung-Sup Yoon ,  Eun-Soo Nam

IPC分类号： H01L29/737 ,  H01L21/331

CPC分类号： H01L29/42304 ,  H01L29/41708 ,  H01L29/66318 ,  H01L29/7371

摘要： Provided are a heterojunction bipolar transistor and a method of forming the same. The method includes forming an emitter electrode on an emitter capping pattern, a base electrode on a base pattern, and a collector electrode on a subcollector pattern, the subcollector pattern, the base pattern, an emitter pattern, and the emitter capping pattern being provided to a substrate; patterning a protection insulation layer and a first dummy pattern covering the emitter electrode, the base electrode, and the collector electrode, to expose the emitter electrode, the base electrode, and the collector electrode; forming a second dummy pattern to electrically separate the emitter electrode, the base electrode, and the collector electrode; forming, on the substrate provided with the second dummy pattern, an emitter electrode interconnection connected to the emitter electrode, a base electrode interconnection connected to the base electrode, and a collector electrode interconnection connected to the collector electrode; and removing the first and second dummy patterns.

摘要翻译： 提供了一种异质结双极晶体管及其形成方法。 该方法包括在发射极盖图案上形成发射电极，在基底图案上形成基极，在子集电极图案上形成集电极，将子集电极图案，基底图案，发射极图案和发射极封盖图案设置在 底物; 图案化保护绝缘层和覆盖发射电极，基极和集电极的第一虚拟图案，以暴露发射极，基极和集电极; 形成第二虚设图形以电分离发射电极，基极和集电极; 在设置有第二虚设图案的基板上形成连接到发射极的发射极电极互连，与基极连接的基极互连和与集电极连接的集电极互连; 以及去除第一和第二虚拟图案。

公开(公告)号：US20130134554A1

公开(公告)日：2013-05-30

申请号：US13618873

申请日：2012-09-14

申请人： Seong-il KIM ,  Sang-Heung LEE ,  Jong-Won LIM ,  Hyung Sup YOON ,  Jongmin LEE ,  Byoung-Gue MIN ,  Jae Kyoung MUN ,  Eun Soo NAM

发明人： Seong-il KIM ,  Sang-Heung LEE ,  Jong-Won LIM ,  Hyung Sup YOON ,  Jongmin LEE ,  Byoung-Gue MIN ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/91 ,  H01L23/481 ,  H01L28/92 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are vertical capacitors and methods of forming the same. The formation of the vertical capacitor may include forming input and output electrodes on a top surface of a substrate, etching a bottom surface of the substrate to form via electrodes, and then, forming a dielectric layer between the via electrodes. As a result, a vertical capacitor with high capacitance can be provided in a small region of the substrate.

摘要翻译： 提供垂直电容器及其形成方法。 垂直电容器的形成可以包括在衬底的顶表面上形成输入和输出电极，蚀刻衬底的底表面以形成通孔电极，然后在通孔电极之间形成电介质层。 结果，可以在基板的小区域中提供具有高电容的垂直电容器。

公开(公告)号：US20110140175A1

公开(公告)日：2011-06-16

申请号：US12832432

申请日：2010-07-08

申请人： Byoung-Gue MIN ,  Jongmin Lee ,  Seong-ll Kim ,  Hyung Sup Yoon

发明人： Byoung-Gue MIN ,  Jongmin Lee ,  Seong-ll Kim ,  Hyung Sup Yoon

IPC分类号： H01L27/06 ,  H01L21/8222

CPC分类号： H01L29/66318 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/66204 ,  H01L29/7371 ,  H01L29/868

摘要： Provided are a monolithic microwave integrated circuit device and a method for forming the same. The method includes: forming an sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer on a Heterojunction Bipolar Transistor (HBT) region and a PIN diode region of a substrate; forming an emitter pattern and an emitter cap pattern in the HBT region and exposing the base layer by patterning the emitter layer and the emitter cap layer; and forming an intrinsic region by doping a portion of the collector layer of the PIN diode region with a first type impurity, the PIN diode region being spaced apart from the HBT region.

摘要翻译： 提供了一种单片微波集成电路器件及其形成方法。 该方法包括：在基底的异质结双极晶体管（HBT）区域和PIN二极管区域上形成子集电极层，集电极层，基极层，发射极层和发射极盖层; 在HBT区域中形成发射极图案和发射极盖图案，并通过图案化发射极层和发射极盖层而使基底层曝光; 并且通过用第一类型杂质掺杂PIN二极管区域的集电极层的一部分来形成本征区域，PIN二极管区域与HBT区域间隔开。

公开(公告)号：US20130026631A1

公开(公告)日：2013-01-31

申请号：US13549795

申请日：2012-07-16

申请人： Byoung-Gue MIN

发明人： Byoung-Gue MIN

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L21/76898 ,  H01L21/6835 ,  H01L21/743 ,  H01L23/4821 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2221/68381 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/8385 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/00

摘要： Disclosed are a semiconductor apparatus and a manufacturing method thereof. The manufacturing method of the semiconductor apparatus includes: forming a semiconductor chip on a semiconductor substrate; adhering a carrier wafer with a plurality of through holes onto the semiconductor chip; polishing the semiconductor substrate; forming a first via hole at the rear side of the polished semiconductor substrate; forming a first metal layer below the polished semiconductor substrate and at the first via hole; and removing the carrier wafer from the polished semiconductor substrate.

摘要翻译： 公开了半导体装置及其制造方法。 半导体装置的制造方法包括：在半导体基板上形成半导体芯片; 将具有多个通孔的载体晶片粘附到所述半导体芯片上; 抛光半导体衬底; 在抛光的半导体衬底的后侧形成第一通孔; 在所述抛光的半导体衬底下方和所述第一通孔处形成第一金属层; 以及从抛光的半导体衬底去除载体晶片。