公开(公告)号：US20210335431A1

公开(公告)日：2021-10-28

申请号：US15405346

申请日：2017-01-13

申请人： CHANG-MIN CHOI ,  BONG-YONG LEE ,  DONG-CHAN KIM ,  SU-JIN AHN

发明人： CHANG-MIN CHOI ,  BONG-YONG LEE ,  DONG-CHAN KIM ,  SU-JIN AHN

IPC分类号： G11C16/34 ,  G11C16/10 ,  G11C16/28 ,  G11C16/30 ,  G11C16/08 ,  G11C16/32

摘要： A method of programming a non-volatile memory includes executing at least two program loops on memory cells in a selected word line, generating a fail bit trend based on a result of executing each of the at least two program loops, predicting a plurality of program loops comprising an N program loop to be executed last on the memory cells, based on the generated fail bit trend, and changing, based on a result of predicting the plurality of program loops, a level of an N program voltage provided to the memory cells when the N program loop is executed.

公开(公告)号：US20170125439A1

公开(公告)日：2017-05-04

申请号：US15223255

申请日：2016-07-29

申请人： CHANG-MIN CHOI ,  JU-YOUNG LIM ,  SU-JIN AHN

发明人： CHANG-MIN CHOI ,  JU-YOUNG LIM ,  SU-JIN AHN

IPC分类号： H01L27/115 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L23/5283 ,  H01L27/0688 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578

摘要： A vertical memory device includes a substrate, a plurality of channels extending in a first direction substantially vertical to a top surface of the substrate, a plurality of gate lines surrounding a predetermined number of channels from among the channels, a plurality of common wirings electrically connected to the gate lines, and a plurality of signal wirings electrically connected to the gate lines via the common wirings. The gate lines are arranged and spaced apart from one another along the first direction. Each common wiring is electrically connected to a corresponding gate line at a same level of the corresponding gate line via a corresponding contact.

公开(公告)号：US20120225504A1

公开(公告)日：2012-09-06

申请号：US13411678

申请日：2012-03-05

申请人： SANG-HYUN HONG ,  JUNG-HYUK LEE ,  SU-JIN AHN ,  DAE-WON HA

发明人： SANG-HYUN HONG ,  JUNG-HYUK LEE ,  SU-JIN AHN ,  DAE-WON HA

IPC分类号： H01L21/66

CPC分类号： H01L22/14 ,  H01L22/20 ,  H01L27/101 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device includes providing a wafer, forming a memory device which includes phase change material layer on the wafer, completing a wafer level process of manufacturing the semiconductor device, and performing a thermal treatment process on the wafer to densify the phase change material. To this end, the process temperature of the thermal treatment is higher than the crystallization temperature of the phase change material and lower than the melting point of the phase change material.

摘要翻译： 一种制造半导体器件的方法包括提供晶片，形成在晶片上包括相变材料层的存储器件，完成制造半导体器件的晶片级工艺，以及对晶片进行热处理以使相位致密化 换材料 为此，热处理的工艺温度高于相变材料的结晶温度，并且低于相变材料的熔点。