System and fabrication method of piezoelectric stack that reduces driving voltage and clamping effect

    公开(公告)号:US10381544B2

    公开(公告)日:2019-08-13

    申请号:US15308819

    申请日:2015-05-06

    摘要: A system and method provides a piezoelectric stack arrangement for reduced driving voltage while maintaining a driving level for active piezoelectric materials. A stack arrangement of d36 shear mode single crystals of both air X-cut and Y-cut ±1:45° (±20°) arrangement are bonded with discrete conductive pillars to form a shear crystal stack. The bonding area between the neighboring crystal parts is minimized. The bonding pillars are positioned at less than a total surface are of the single crystal forming the stack. The stack fabrication is facilitated with a precision assembly system, where crystal parts are placed to desired locations on an assembly fixture for alignment following the preset operation steps. With the reduced clamping effect from bonding due to lower surface coverage of the discrete conductive pillars, such a piezoelectric d36 shear crystal stack exhibits a reduced driving voltage while maintaining a driving level and substantial and surprisingly improved performance.