公开(公告)号：US20050253218A1

公开(公告)日：2005-11-17

申请号：US11114693

申请日：2005-04-26

申请人： Chang-ki Jeon ,  Sung-Iyong Kim ,  Tae-hun Kwon

发明人： Chang-ki Jeon ,  Sung-Iyong Kim ,  Tae-hun Kwon

IPC分类号： H01L21/335 ,  H01L27/06 ,  H01L29/06 ,  H01L29/08 ,  H01L29/76 ,  H01L29/78

CPC分类号： H01L29/7816 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/7823

摘要： There is provided a high voltage gate driver integrated circuit. The high voltage gate driver integrated circuit includes: a high voltage region; a junction termination region surrounding the high voltage region; a low voltage region surrounding the junction termination region; a level shift transistor disposed between the high voltage region and the low voltage region, at least some portions of the level shift transistor being overlapped with the junction termination region; and/or a high voltage junction capacitor disposed between the high voltage region and the low voltage region, at least some portions of the high voltage junction capacitor being overlapped with the junction termination region.

摘要翻译： 提供了高压栅极驱动器集成电路。 高压栅极驱动器集成电路包括：高电压区域; 围绕高电压区域的接合端接区域; 围绕所述连接端接区域的低电压区域; 设置在所述高电压区域和所述低电压区域之间的电平移位晶体管，所述电平移位晶体管的至少一些部分与所述连接终止区域重叠; 和/或设置在高电压区域和低电压区域之间的高压结电容器，高压结电容器的至少一些部分与接合端接区域重叠。

公开(公告)号：US20080074165A1

公开(公告)日：2008-03-27

申请号：US11950959

申请日：2007-12-05

申请人： Chang-Ki Jeon ,  Sung-Iyong Kim ,  Tae-hun kwon

发明人： Chang-Ki Jeon ,  Sung-Iyong Kim ,  Tae-hun kwon

IPC分类号： H03L5/00

CPC分类号： H01L29/7816 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/7823

摘要： There is provided a high voltage gate driver integrated circuit. The high voltage gate driver integrated circuit includes: a high voltage region; a junction termination region surrounding the high voltage region; a low voltage region surrounding the junction termination region; a level shift transistor disposed between the high voltage region and the low voltage region, at least some portions of the level shift transistor being overlapped with the junction termination region; and/or a high voltage junction capacitor disposed between the high voltage region and the low voltage region, at least some portions of the high voltage junction capacitor being overlapped with the junction termination region.

摘要翻译： 提供了高压栅极驱动器集成电路。 高压栅极驱动器集成电路包括：高电压区域; 围绕高电压区域的接合端接区域; 围绕所述连接端接区域的低电压区域; 设置在所述高电压区域和所述低电压区域之间的电平移位晶体管，所述电平移位晶体管的至少一些部分与所述连接终止区域重叠; 和/或设置在高电压区域和低电压区域之间的高压结电容器，高压结电容器的至少一些部分与接合端接区域重叠。

公开(公告)号：US07655979B2

公开(公告)日：2010-02-02

申请号：US11950959

申请日：2007-12-05

申请人： Chang-Ki Jeon ,  Sung-Iyong Kim ,  Tae-hun Kwon

发明人： Chang-Ki Jeon ,  Sung-Iyong Kim ,  Tae-hun Kwon

IPC分类号： H01L29/772 ,  H01L21/265

CPC分类号： H01L29/7816 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/7823

摘要： There is provided a high voltage gate driver integrated circuit. The high voltage gate driver integrated circuit includes: a high voltage region; a junction termination region surrounding the high voltage region; a low voltage region surrounding the junction termination region; a level shift transistor disposed between the high voltage region and the low voltage region, at least some portions of the level shift transistor being overlapped with the junction termination region; and/or a high voltage junction capacitor disposed between the high voltage region and the low voltage region, at least some portions of the high voltage junction capacitor being overlapped with the junction termination region.

摘要翻译： 提供了高压栅极驱动器集成电路。 高压栅极驱动器集成电路包括：高电压区域; 围绕高电压区域的接合端接区域; 围绕所述连接端接区域的低电压区域; 设置在所述高电压区域和所述低电压区域之间的电平移位晶体管，所述电平移位晶体管的至少一些部分与所述连接终止区域重叠; 和/或设置在高电压区域和低电压区域之间的高压结电容器，高压结电容器的至少一些部分与接合端接区域重叠。

公开(公告)号：US20090166797A1

公开(公告)日：2009-07-02

申请号：US12397426

申请日：2009-03-04

申请人： Sung-Iyong Kim ,  Chang-ki Jeon

发明人： Sung-Iyong Kim ,  Chang-ki Jeon

IPC分类号： H01L27/06 ,  H01L29/93 ,  H01L23/58

CPC分类号： H01L29/8611 ,  H01L27/0629 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/868 ,  H01L2924/0002 ,  H03K17/6877 ,  H03K2217/0036 ,  H01L2924/00

摘要： Provided is a high-voltage integrated circuit device including a high-voltage resistant diode. The device includes a low-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a ground voltage, a high-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a voltage that varies from the ground voltage to a high voltage, a junction termination and a first isolation region electrically isolating the low-voltage circuit region from the high-voltage circuit region, a high-voltage resistant diode formed between the low-voltage circuit region and the high-voltage circuit region, and a second isolation region surrounding the high-voltage resistant diode and electrically isolating the high-voltage resistant diode from the low-voltage circuit region and the high-voltage circuit region. Therefore, a leakage current of the high-voltage resistant diode can be prevented.

摘要翻译： 提供一种包括耐高压二极管的高压集成电路装置。 该器件包括具有多个相对于接地电压工作的多个半导体器件的低电压电路区域，具有多个半导体器件的高电压电路区域，其相对于从地面变化的电压工作 电压到高电压，接合端接和将低压电路区域与高压电路区域电隔离的第一隔离区域，形成在低压电路区域和高压电路之间的高耐压二极管 以及围绕所述耐高压二极管的第二隔离区域，并且将所述耐高压二极管与所述低压电路区域和所述高压电路区域电隔离。 因此，可以防止高耐压二极管的漏电流。

公开(公告)号：US06600206B2

公开(公告)日：2003-07-29

申请号：US10123007

申请日：2002-04-15

申请人： Chang-ki Jeon ,  Sung-Iyong Kim ,  Jong-jib Kim

发明人： Chang-ki Jeon ,  Sung-Iyong Kim ,  Jong-jib Kim

IPC分类号： H01L2900

CPC分类号： H01L29/7816 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/1095

摘要： A high voltage semiconductor device is provided. The high voltage semiconductor device includes a tow voltage region, a high voltage region, and a high breakdown voltage isolation region. The high voltage region is surrounded by the low voltage region and has corner portions at one side thereof. The high breakdown voltage isolation region has an isolation region for electrically separating the low and high voltage regions from each other and a lateral double diffused metal-oxide-semiconductor (DMOS) transistor for transmitting a signal from the low voltage region to the high voltage region. In particular, a drain region of the lateral DMOS transistor is disposed between the corner portions of the high voltage region, and opposite edges of the corner portions of the high voltage region and drain region of the lateral DMOS transistor are curved.

摘要翻译： 提供高压半导体器件。 高电压半导体器件包括丝束电压区域，高电压区域和高击穿电压隔离区域。 高电压区域被低电压区域包围，并且在其一侧具有角部。 高击穿电压隔离区域具有用于将低电压区域和高电压区域彼此电隔离的隔离区域和用于将信号从低电压区域传输到高电压区域的横向双扩散金属氧化物半导体（DMOS）晶体管 。 特别地，横向DMOS晶体管的漏极区域设置在高电压区域的角部之间，并且横向DMOS晶体管的高压区域和漏极区域的拐角部分的相对边缘是弯曲的。