Ubs host controller with dma capability
    1.
    发明申请
    Ubs host controller with dma capability 有权
    具有dma功能的Ubs主机控制器

    公开(公告)号:US20070028011A1

    公开(公告)日:2007-02-01

    申请号:US10556453

    申请日:2004-05-12

    IPC分类号: G06F13/28

    CPC分类号: G06F13/385

    摘要: An embedded host controller, for use in a USB system comprising a processor and an associated system memory, comprises a DMA controller, and the host controller is adapted such that, in order to retrieve data from the associated system memory, a starting address and block length are sent to the DMA controller, and the DMA controller is adapted such that, on receipt of a starting address and block length sent from the host controller, it retrieves the indicated data from the associated system memory. This has the advantage that the embedded host controller can be used with different host microprocessors, without assuming that PCI functionality is available.

    摘要翻译: 用于包括处理器和相关系统存储器的USB系统中的嵌入式主机控制器包括DMA控制器,并且主机控制器被调整为使得为了从相关联的系统存储器检索数据,起始地址和块 长度被发送到DMA控制器,并且DMA控制器被调整为使得在接收到从主机控制器发送的起始地址和块长度时,它从相关联的系统存储器检索指示的数据。 这具有的优点是嵌入式主机控制器可以与不同的主机微处理器一起使用,而不需要PCI功能可用。

    Package integrated one-quarter wavelength and three-quarter wavelength balun
    2.
    发明申请
    Package integrated one-quarter wavelength and three-quarter wavelength balun 失效
    封装集成了四分之一波长和四分之一波长的平衡 - 不平衡转换器

    公开(公告)号:US20060001501A1

    公开(公告)日:2006-01-05

    申请号:US10883405

    申请日:2004-06-30

    IPC分类号: H01P5/02

    CPC分类号: H01P5/10

    摘要: According to embodiments of the present invention, a balun is disposed on a package that is to receive a die. In embodiments, the balun includes a first metal trace disposed on a first base and a second metal trace disposed on a second base. In embodiments, the first metal trace is one-quarter wavelength of an operating wavelength for a radio frequency (RF) signal and the second metal trace is three-quarters wavelength of the wavelength.

    摘要翻译: 根据本发明的实施例,将平衡 - 不平衡转换器设置在要接收管芯的包装上。 在实施例中,平衡 - 不平衡变换器包括布置在第一基底上的第一金属迹线和设置在第二基底上的第二金属迹线。 在实施例中,第一金属迹线是用于射频(RF)信号的工作波长的四分之一波长,并且第二金属迹线是波长的四分之三波长。

    Single instruction type based hardware patch controller
    3.
    发明申请
    Single instruction type based hardware patch controller 审中-公开
    单指令型硬件补丁控制器

    公开(公告)号:US20050223292A1

    公开(公告)日:2005-10-06

    申请号:US10781371

    申请日:2004-02-17

    IPC分类号: G06F11/00

    CPC分类号: G06F8/60

    摘要: A patch mechanism is described, which can be used to detect and workaround defects and conditions existing in an integrated circuit chip. The patch mechanism includes a trigger-matching logic incorporated within an integrated circuit chip to capture an incoming request cycle and determine if the captured incoming cycle matches one or more of trigger conditions. The patch mechanism further includes a control logic coupled to the trigger-matching logic to select a set of instructions upon detection of at least one matched trigger condition and to execute operations corresponding to the selected set of instructions. The control logic is configured to select the set of instructions based on the at least one matched trigger condition.

    摘要翻译: 描述了一种补丁机制,可用于检测和解决集成电路芯片中存在的缺陷和状况。 补丁机制包括一个集成在集成电路芯片内的触发器匹配逻辑,以捕获进入的请求周期并确定捕获的进入周期是否匹配一个或多个触发条件。 补丁机制还包括耦合到触发匹配逻辑的控制逻辑,以在检测到至少一个匹配的触发条件时选择一组指令,并执行与所选指令集相对应的操作。 所述控制逻辑被配置为基于所述至少一个匹配的触发条件来选择所述指令集。

    Integrated circuit die configuration for packaging
    5.
    发明申请
    Integrated circuit die configuration for packaging 有权
    集成电路管芯配置包装

    公开(公告)号:US20060094222A1

    公开(公告)日:2006-05-04

    申请号:US10977157

    申请日:2004-10-29

    申请人: Chee Wong Chee Lee

    发明人: Chee Wong Chee Lee

    IPC分类号: H01L21/44

    摘要: Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.

    摘要翻译: 集成电路管芯端子布置和配置,用于将集成电路管芯安装在封装衬底上,以减少封装传输路径。 在一个实施例中,对于在管芯外部的迹线长度敏感的信号的端子设置在管芯的角部。 模具相对于封装衬底以一定角度安装在封装衬底上,以将芯片的角部指向封装衬底的边缘,以减小管芯外部的迹线长度。 管芯的中心可以与衬底的中心重合或者不一致。 在一个实施例中,当与居中的未旋转的模具安装位置相比时,安装具有指向封装基板边缘的拐角的模具不会引起基板翘曲的显着差异。

    Method and system for using a patch module to process non-posted request cycles and to control completions returned to requesting device
    6.
    发明申请
    Method and system for using a patch module to process non-posted request cycles and to control completions returned to requesting device 有权
    用于使用补丁模块来处理非发布请求周期并控制返回到请求设备的完成的方法和系统

    公开(公告)号:US20050182869A1

    公开(公告)日:2005-08-18

    申请号:US10781512

    申请日:2004-02-17

    IPC分类号: G06F3/00

    CPC分类号: G06F12/0638

    摘要: A system is described for providing a patch mechanism within an input/output (I/O) controller, which can be used to workaround defects and conditions existing in the I/O controller. The system includes a patch module coupled to a completion queue included in the I/O controller. The patch module is used to sample incoming cycles received by the I/O controller and to determine if the captured incoming cycle matches one or more of preprogrammed trigger conditions. The patch module is capable of working around a captured non-posted request cycle by controlling header information loaded into the completion queue and by instructing the completion queue whether or not to discard a completion received from a designated end-device.

    摘要翻译: 描述了一种系统,用于在输入/输出(I / O)控制器内提供补丁机制,可用于解决I / O控制器中存在的缺陷和状况。 该系统包括耦合到包括在I / O控制器中的完成队列的补丁模块。 补丁模块用于对I / O控制器接收的进入周期进行采样,并确定捕获的进入周期是否匹配一个或多个预编程触发条件。 补丁模块能够通过控制加载到完成队列中的头信息并通过指示完成队列来确定是否丢弃从指定的终端设备接收到的完成,来围绕捕获的非发布请求周期进行操作。