Flexible array substrate, manufacturing method thereof, flexible display device

    公开(公告)号:US11563033B2

    公开(公告)日:2023-01-24

    申请号:US16905105

    申请日:2020-06-18

    发明人: Yuanzheng Guo Tao Gao

    IPC分类号: H01L27/12 H01L27/32 H01L51/00

    摘要: Embodiments of the present disclosure provide a flexible array substrate, a manufacturing method thereof, and a flexible display device, which relate to the field of display technology, and can reduce the difficulty of wiring, decrease the IR drop, and improve the problem that the wiring is prone to breakage when bent. The flexible array substrate includes a substrate, the substrate including a first sub-substrate and a second sub-substrate which are stacked, the second sub-substrate including at least one via hole; a wiring layer disposed between the first sub-substrate and the second sub-substrate; and a pixel array layer disposed on a side of the second sub-substrate facing away from the first sub-substrate; the wiring layer including a wiring, wherein the pixel array layer is electrically connected to the wiring through the at least one via hole.

    DISPLAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE

    公开(公告)号:US20220320227A1

    公开(公告)日:2022-10-06

    申请号:US17310401

    申请日:2020-09-30

    IPC分类号: H01L27/32

    摘要: A display substrate, a display panel, and a display device are provided. The display substrate includes: a base substrate; a first semiconductor layer on the base substrate; and a second semiconductor layer on a side of the first semiconductor layer away from the base substrate. The display substrate further includes a plurality of thin film transistors on the base substrate, which at least include a first transistor, a second transistor and a third transistor. Each of the plurality of thin film transistors includes an active layer. The active layer of at least one of the first transistor and the second transistor is located in the second semiconductor layer and contains an oxide semiconductor material. The active layer of the third transistor is located in the first semiconductor layer and contains a polysilicon semiconductor material. At least one of the first transistor and the second transistor has a dual-gate structure.

    ARRAY SUBSTRATE, PREPARATION METHOD THEREOF AND DISPLAY PANEL

    公开(公告)号:US20210098503A1

    公开(公告)日:2021-04-01

    申请号:US17007477

    申请日:2020-08-31

    IPC分类号: H01L27/12

    摘要: A method for preparing an array substrate includes: forming first and second active layers, and first and second gate layers above a base substrate; forming first and second via holes for exposing the first active layer and etching the first active layer; forming a first source-drain electrode layer including a first source electrode layer contacting the first active layer through the first via hole and a first drain electrode layer contacting the first active layer through the second via hole; forming third and fourth via holes for exposing the second active layer; forming a second source-drain electrode layer including a second source electrode layer contacting the second active layer through the third via hole and a second drain electrode layer contacting the second active layer through the fourth via hole. The second source/drain electrode layer is electrically connected with the first source-drain electrode layer.