摘要:
A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.
摘要:
A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.
摘要:
An apparatus for clock skew compensation is provided. The apparatus includes a first delay locked loop (DLL) module disposed in a first die and a second DLL module disposed in a second die. A first input terminal of the first DLL module receives a reference clock. A first input terminal of the second DLL module is electrically connected to an output terminal of the first DLL module. An output terminal of the second DLL module is electrically connected to a second input terminal of the first DLL module.
摘要:
An apparatus for clock skew compensation is provided. The apparatus includes a first delay locked loop (DLL) module disposed in a first die and a second DLL module disposed in a second die. A first input terminal of the first DLL module receives a reference clock. A first input terminal of the second DLL module is electrically connected to an output terminal of the first DLL module. An output terminal of the second DLL module is electrically connected to a second input terminal of the first DLL module.
摘要:
The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first signal and a second signal; and a converter for converting a phase different between the first signal and the second signal into a relevant digital code; wherein the phase difference between the first signal and the second signal is an amplification of jitter.
摘要:
The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first signal and a second signal; and a converter for converting a phase different between the first signal and the second signal into a relevant digital code; wherein the phase difference between the first signal and the second signal is an amplification of jitter.
摘要:
The present invention describes compounds of Formula I or a pharmaceutically acceptable salt thereof, for the prophylaxis, or treatment of diseases and conditions related to thrombin activity in a mammal. The present invention also relates to a novel method of N-oxidation of nitrogen containing heteroaryls.
摘要:
A ventilation apparatus having a humidity adjusting and sterilizing device, and a method for controlling the same method are disclosed. A humidity adjusting and sterilizing device includes a channel allowing air to flow therein; a housing having a side in communication with the channel, the housing having the other sides closed; a tub mounted within the housing for holding water therein; and a microwave generator for humidifying the air within the channel and for sterilizing bacteria contained in the air of the channel by radiating the microwaves discharged into the channel. The humidity adjusting and sterilizing device includes a housing having a side in communication with the inlet channel, the housing having the other sides closed; a tub mounted within the housing for holding water therein; and a microwave generator for radiating microwaves into the housing and the tub and.
摘要:
An integral multilevel debris-catching system for a nuclear reactor fuel assembly having a lower protective grid incorporating laterally offset debris-catching arches at several elevations, extended solid fuel rod bottom end plugs and a bottom debris-filtering nozzle. Dimples and opposing opposite springs and the debris-trapping arches, which are spaced from the end plugs, are all located at elevations below the fuel cladding.
摘要:
A frequency synthesizer includes a multi-signal comparing phase frequency detector/converter, a loop filter, a controllable oscillator, and a frequency divider. The multi-signal comparing phase frequency detector/converter simultaneously receives N input reference frequency signals and N feedback reference frequency signals. Frequencies of the input reference frequency signals are equivalent to one another while phases thereof are different from one another. Frequencies of the feedback reference frequency signals are equivalent to one another while phases thereof are different from one another. The multi-signal comparing phase frequency detector/converter compares the input reference frequency signals and corresponding feedback reference frequency signals, and then outputs a comparison control signal according to the comparison result. The frequency synthesizer of the present invention is adapted to depress a reference spur, thus achieving an ideal output frequency signal.