公开(公告)号：US06953715B2

公开(公告)日：2005-10-11

申请号：US10934014

申请日：2004-09-03

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L29/423 ,  H01L21/00

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming an undoped amorphous silicon layer on a silicon nitride layer, ii) forming an etching mask on the undoped amorphous silicon layer, and iii) forming two doped amorphous silicon layers on portion of the undoped amorphous silicon layer and the etching mask, the two doped amorphous silicon layers being spaced apart and located on either side of the gate, wherein an etching selectivity ratio of the undpoed and doped amorphous silicon layers over the dielectric layer being not less than about 5.0.

公开(公告)号：US06800510B2

公开(公告)日：2004-10-05

申请号：US10289470

申请日：2002-11-06

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： H01L2100

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A method of controlling the capacitance of the TFT-LCD storage capacitor is provided. The gate dielectric layer of the TFT is composed of a silicon nitride layer, a dielectric layer and a silicon nitride layer, and the etching selectivity of the amorphous silicon layer over the dielectric layer is not less than about 5.0. Therefore, the dielectric layer can be an etching stop layer when a doped and an undoped amorphous silicon layers are etched to form source/drain stacked layers or a conductive layer is etched to form a gate on the gate dielectric layer. Hence, the dielectric layer thickness can be controlled; thereby the capacitance of the storage capacitor can be controlled.

摘要翻译： 提供了一种控制TFT-LCD存储电容器的电容的方法。 TFT的栅介质层由氮化硅层，电介质层和氮化硅层组成，非晶硅层在电介质层上的蚀刻选择性不小于约5.0。 因此，当蚀刻掺杂的和未掺杂的非晶硅层以形成源极/漏极堆叠层时或者蚀刻导电层以在栅极介电层上形成栅极时，介电层可以是蚀刻停止层。 因此，可以控制介电层厚度; 从而可以控制存储电容器的电容。

公开(公告)号：US07087469B2

公开(公告)日：2006-08-08

申请号：US10934242

申请日：2004-09-03

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： H01L21/00

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming a silicon island and a bottom electrode on the transparent substrate, the silicon island having an undoped region located on the central portion, and two doped regions respectively located on both sides, ii) forming a first silicon nitride layer on the transparent substrate, and iii) forming a stacked layer comprising a second silicon nitride layer and a conductive layer on the undoped region of the silicon island, and the first conductive layer of the stacked layer serving as a gate of a thin film transistor, wherein an etching selectivity ratio of the conductive layer over the dielectric layer is not less than about 5.0.

摘要翻译： 公开了一种控制薄膜晶体管液晶显示器（TFT-LCD）存储电容器的电容的方法。 在某些实施例中，该方法包括：i）在透明基底上形成硅岛和底部电极，硅岛具有位于中心部分上的未掺杂区域，以及分别位于两侧的两个掺杂区域，ii）形成第一 氮化硅层，以及iii）在所述硅岛的未掺杂区域上形成包括第二氮化硅层和导电层的堆叠层，并且所述层叠层的第一导电层用作薄的栅极 薄膜晶体管，其中导电层在电介质层上的蚀刻选择率不小于约5.0。

公开(公告)号：US07145172B2

公开(公告)日：2006-12-05

申请号：US10932828

申请日：2004-09-02

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： H01L31/0376 ,  H01L21/00

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A thin film transistor array substrate of a thin film transistor liquid crystal display (TFT-LCD) is provided. The gate dielectric layer of the TFT includes a silicon nitride layer, a dielectric layer and a silicon nitride layer, and the etching selectivity of the amorphous silicon layer over the dielectric layer is not less than about 5.0. Therefore, the dielectric layer can be an etching stop layer when doped and undoped amorphous silicon layers are etched to form source/drain stacked layers or a conductive layer is etched to form a gate on the gate dielectric layer. Hence, the dielectric layer thickness can be controlled, and thereby the capacitance of the storage capacitor can be controlled.

摘要翻译： 提供薄膜晶体管液晶显示器（TFT-LCD）的薄膜晶体管阵列基板。 TFT的栅介质层包括氮化硅层，电介质层和氮化硅层，并且非晶硅层在电介质层上的蚀刻选择性不小于约5.0。 因此，当掺杂和非掺杂非晶硅层被蚀刻以形成源极/漏极堆叠层时，介电层可以是蚀刻停止层，或蚀刻导电层以在栅极介电层上形成栅极。 因此，可以控制介电层厚度，从而可以控制存储电容器的电容。

公开(公告)号：US20050037533A1

公开(公告)日：2005-02-17

申请号：US10934014

申请日：2004-09-03

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L29/423 ,  H01L21/00

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming an undoped amorphous silicon layer on a silicon nitride layer, ii) forming an etching mask on the undoped amorphous silicon layer, and iii) forming two doped amorphous silicon layers on portion of the undoped amorphous silicon layer and the etching mask, the two doped amorphous silicon layers being spaced apart and located on either side of the gate, wherein an etching selectivity ratio of the undpoed and doped amorphous silicon layers over the dielectric layer being not less than about 5.0.

摘要翻译： 公开了一种控制薄膜晶体管液晶显示器（TFT-LCD）存储电容器的电容的方法。 在某些实施例中，该方法包括：i）在氮化硅层上形成未掺杂的非晶硅层，ii）在未掺杂的非晶硅层上形成蚀刻掩模，以及iii）在未掺杂的非晶硅的部分上形成两个掺杂非晶硅层 层和蚀刻掩模，两个掺杂的非晶硅层间隔开并位于栅极的任一侧，其中在电介质层上的未掺杂和掺杂的非晶硅层的蚀刻选择率不小于约5.0。

公开(公告)号：US20050032263A1

公开(公告)日：2005-02-10

申请号：US10934242

申请日：2004-09-03

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L29/423 ,  H01L21/00

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A method of controlling the capacitance of a thin film transistor liquid crystal display (TFT-LCD) storage capacitor is disclosed. In certain embodiments, the method includes i) forming a silicon island and a bottom electrode on the transparent substrate, the silicon island having an undoped region located on the central portion, and two doped regions respectively located on both sides, ii) forming a first silicon nitride layer on the transparent substrate, and iii) forming a stacked layer comprising a second silicon nitride layer and a conductive layer on the undoped region of the silicon island, and the first conductive layer of the stacked layer serving as a gate of a thin film transistor, wherein an etching selectivity ratio of the conductive layer over the dielectric layer is not less than about 5.0.

摘要翻译： 公开了一种控制薄膜晶体管液晶显示器（TFT-LCD）存储电容器的电容的方法。 在某些实施例中，该方法包括：i）在透明基底上形成硅岛和底部电极，硅岛具有位于中心部分上的未掺杂区域，以及分别位于两侧的两个掺杂区域，ii）形成第一 氮化硅层，以及iii）在所述硅岛的未掺杂区域上形成包括第二氮化硅层和导电层的堆叠层，并且所述层叠层的第一导电层用作薄的栅极 薄膜晶体管，其中导电层在电介质层上的蚀刻选择率不小于约5.0。

公开(公告)号：US20050023533A1

公开(公告)日：2005-02-03

申请号：US10932828

申请日：2004-09-02

申请人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

发明人： Chih-Yu Peng ,  Wei-Chuan Lin ,  Chian-Chih Hsiao ,  Ta-Ko Chuang ,  Chun-Hung Chu ,  Chih-Lung Lin ,  Chin-Mao Lin

IPC分类号： G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L29/423 ,  H01L29/04

CPC分类号： H01L27/1248 ,  G02F1/136213 ,  H01L27/1255 ,  H01L29/42384

摘要： A thin film transistor array substrate of a thin film transistor liquid crystal display (TFT-LCD) is provided. The gate dielectric layer of the TFT includes a silicon nitride layer, a dielectric layer and a silicon nitride layer, and the etching selectivity of the amorphous silicon layer over the dielectric layer is not less than about 5.0. Therefore, the dielectric layer can be an etching stop layer when doped and undoped amorphous silicon layers are etched to form source/drain stacked layers or a conductive layer is etched to form a gate on the gate dielectric layer. Hence, the dielectric layer thickness can be controlled, and thereby the capacitance of the storage capacitor can be controlled.

摘要翻译： 提供薄膜晶体管液晶显示器（TFT-LCD）的薄膜晶体管阵列基板。 TFT的栅介质层包括氮化硅层，电介质层和氮化硅层，并且非晶硅层在电介质层上的蚀刻选择性不小于约5.0。 因此，当掺杂和非掺杂非晶硅层被蚀刻以形成源极/漏极堆叠层时，介电层可以是蚀刻停止层，或蚀刻导电层以在栅极介电层上形成栅极。 因此，可以控制介电层厚度，从而可以控制存储电容器的电容。

公开(公告)号：US20140116091A1

公开(公告)日：2014-05-01

申请号：US14122807

申请日：2012-05-30

申请人： Ta-Ko Chuang ,  Daniel Ralph Harvey ,  Alexander Mikhailovich Streltsov

发明人： Ta-Ko Chuang ,  Daniel Ralph Harvey ,  Alexander Mikhailovich Streltsov

IPC分类号： C03C23/00 ,  C03C15/00

CPC分类号： C03C23/002 ,  C03C15/00 ,  C03C23/0025 ,  G02B6/136 ,  G02B2006/1213

摘要： A method for fabricating a high-density array of holes in glass comprises providing a glass sheet having a front surface and irradiating the glass sheet with a laser beam so as to produce open holes extending into the glass sheet from the front surface of the glass sheet. The beam creates thermally induced residual stress within the glass around the holes, and after irradiating, the glass sheet is annealed to eliminate or reduce thermal stress caused by the step of irradiating. The glass sheet is then etched to produce the final hole size. Preferably, the glass sheet is also annealed before the step of irradiating, at sufficiently high temperature for a sufficient time to render the glass sheet dimensionally stable during the step of annealing after irradiating.

摘要翻译： 一种在玻璃中制造高密度孔阵列的方法，包括提供具有前表面的玻璃板，并用激光束照射玻璃板，以便从玻璃板的前表面产生延伸到玻璃板中的开孔 。 光束在孔周围的玻璃内产生热致残余应力，并且在照射之后，玻璃板被退火以消除或降低由照射步骤引起的热应力。 然后对玻璃板进行蚀刻以产生最终的孔尺寸。 优选地，在足够高的温度下照射步骤之前，玻璃片也经过退火，以使其在照射后的退火步骤中尺寸稳定。

公开(公告)号：US06741319B2

公开(公告)日：2004-05-25

申请号：US10192038

申请日：2002-07-10

申请人： Ta-Ko Chuang ,  Sakae Tanaka

发明人： Ta-Ko Chuang ,  Sakae Tanaka

IPC分类号： G02F11339

CPC分类号： G02F1/133351

摘要： A process for separating substrates in liquid crystal display is disclosed. The process for separating substrates in liquid crystal display includes step of providing a first substrate and a second substrate, wherein the first and second substrates being combined together by seal, forming a scribing line on the first substrate, and separating the first substrate into at least two parts along the scribing line by exerting air pressure upon the second substrate.

摘要翻译： 公开了一种在液晶显示器中分离衬底的工艺。 在液晶显示器中分离衬底的方法包括提供第一衬底和第二衬底的步骤，其中通过密封将第一和第二衬底组合在一起，在第一衬底上形成刻划线，并将第一衬底分离成至少 通过在第二基板上施加空气压力，沿着划刻线两个部分。

公开(公告)号：US20130130473A1

公开(公告)日：2013-05-23

申请号：US13714792

申请日：2012-12-14

申请人： Nadia Ben Mohamed ,  Ta-Ko Chuang ,  Jeffrey Scott Cites ,  Daniel Delprat ,  Alex Usenko

发明人： Nadia Ben Mohamed ,  Ta-Ko Chuang ,  Jeffrey Scott Cites ,  Daniel Delprat ,  Alex Usenko

IPC分类号： H01L21/762

CPC分类号： H01L29/02 ,  H01L21/185 ,  H01L21/762 ,  H01L21/76254

摘要： A semiconductor-on-glass substrate having a relatively stiff (e.g. relatively high Young's modulus of 125 or higher) stiffening layer or layers placed between the silicon film and the glass in order to eliminate the canyons and pin holes that otherwise form in the surface of the transferred silicon film during the ion implantation thin film transfer process. The new stiffening layer may be formed of a material, such as silicon nitride, that also serves as an efficient barrier against penetration of sodium and other harmful impurities from the glass substrate into the silicon film.

摘要翻译： 一种半导体玻璃衬底，其具有相对较硬（例如相对较高的杨氏模量为125或更高）的加强层或者放置在硅膜和玻璃之间的层，以消除否则在表面上形成的峡谷和针孔 在离子注入薄膜转移过程中转移的硅膜。 新的加强层可以由诸如氮化硅的材料形成，其也用作有效阻挡钠和其它有害杂质从玻璃基板渗透到硅膜中的有效屏障。