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公开(公告)号：US07029958B2
公开(公告)日：2006-04-18
申请号：US10699887
申请日：2003-11-04
申请人： Cyrus E. Tabery , Shibly S. Ahmed , Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang , Chih-Yuh Yang , Bin Yu
发明人： Cyrus E. Tabery , Shibly S. Ahmed , Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang , Chih-Yuh Yang , Bin Yu
IPC分类号： H01L21/00
CPC分类号： H01L29/785 , H01L29/66818 , H01L29/7842
摘要： A method for forming a metal-oxide semiconductor field-effect transistor (MOSFET) includes patterning a fin area, a source region, and a drain region on a substrate, forming a fin in the fin area, and forming a mask in the fin area. The method further includes etching the mask to expose a channel area of the MOSFET, etching the fin to thin a width of the fin in the channel area, forming a gate over the fin, and forming contacts to the gate, the source region, and the drain region.
摘要翻译： 一种形成金属氧化物半导体场效应晶体管（MOSFET）的方法包括在衬底上构图翅片区域，源极区域和漏极区域，在翅片区域中形成鳍片，并在鳍片区域中形成掩模 。 该方法还包括蚀刻掩模以暴露MOSFET的沟道区域，蚀刻鳍以在沟道区域中减薄翅片的宽度，在鳍上方形成栅极，以及形成与栅极，源区和 漏极区域。
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公开(公告)号：US06787854B1
公开(公告)日：2004-09-07
申请号：US10385753
申请日：2003-03-12
申请人： Chih-Yuh Yang , Shibly S. Ahmed , Srikanteswara Dakshina-Murthy , Cyrus E. Tabery , Haihong Wang , Bin Yu
发明人： Chih-Yuh Yang , Shibly S. Ahmed , Srikanteswara Dakshina-Murthy , Cyrus E. Tabery , Haihong Wang , Bin Yu
IPC分类号： H01L218238
CPC分类号： H01L29/7853 , H01L29/66818
摘要： A method for forming a fin structure on a silicon-on-insulator (SOI) wafer that includes a silicon layer on an insulating layer that is formed over a semiconductor substrate includes etching the silicon layer using a first etch procedure, etching, following the first etch procedure, the silicon layer using a second etch procedure, and etching, following the second etch procedure, the silicon layer using a third etch procedure to form a T-shaped fin structure.
摘要翻译： 一种在绝缘体上硅（SOI）晶片上形成翅片结构的方法，包括在半导体衬底上形成的绝缘层上的硅层，包括使用第一蚀刻步骤蚀刻硅层，然后蚀刻第一 蚀刻步骤，使用第二蚀刻步骤的硅层，以及在第二蚀刻程序之后，使用第三蚀刻工艺蚀刻硅层以形成T形翅片结构。
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3.发明授权公开(公告)号：US07432558B1
公开(公告)日：2008-10-07
申请号：US10863392
申请日：2004-06-09
IPC分类号： H01L29/72
CPC分类号： H01L29/045 , H01L29/66795 , H01L29/785
摘要： A semiconductor device may include a substrate and an insulating layer formed on the substrate. A fin may be formed on the insulating layer. The fin may include a side surface and a top surface, and the side surface may have a orientation. A first gate may be formed on the insulating layer proximate to the side surface of the fin.
摘要翻译： 半导体器件可以包括衬底和形成在衬底上的绝缘层。 可以在绝缘层上形成翅片。 翅片可以包括侧表面和顶表面，并且侧表面可以具有<100>取向。 第一栅极可以形成在靠近鳍片的侧表面的绝缘层上。
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公开(公告)号：US06960804B1
公开(公告)日：2005-11-01
申请号：US10633034
申请日：2003-10-10
IPC分类号： H01L21/027 , H01L21/336 , H01L29/786 , H01L29/788
CPC分类号： H01L29/785 , H01L21/0276 , H01L29/42392 , H01L29/66795
摘要： A double-semiconductor device includes a substrate, an insulating layer, a fin and a gate. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The fin has a number of side surfaces, a top surface and a bottom surface. The gate is formed on the insulating layer and surrounds the top surface, bottom surface and the side surfaces of the fin in the channel region of the semiconductor device. Surrounding the fin with gate material results in an increased total channel width and more flexible device adjustment margins.
摘要翻译： 双半导体器件包括衬底，绝缘层，鳍和栅极。 绝缘层形成在基板上，并且鳍形成在绝缘层上。 翅片具有多个侧表面，顶表面和底表面。 栅极形成在绝缘层上并且围绕半导体器件的沟道区域中的鳍的顶表面，底表面和侧表面。 用门材料围绕翅片会导致总通道宽度增加和设备调整裕度更灵活。
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公开(公告)号：US07179692B2
公开(公告)日：2007-02-20
申请号：US10913409
申请日：2004-08-09
申请人： Bin Yu , Shibly S. Ahmed , Judy Xilin An , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang
发明人： Bin Yu , Shibly S. Ahmed , Judy Xilin An , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang
CPC分类号： H01L29/785 , H01L29/41733 , H01L29/42384 , H01L29/66795 , H01L29/66803
摘要： A method of forming a semiconductor device includes forming a fin on an insulating layer, where the fin includes a number of side surfaces, a top surface and a bottom surface. The method also includes forming a gate on the insulating layer, where the gate has a substantially U-shaped cross-section at a channel region of the semiconductor device.
摘要翻译： 形成半导体器件的方法包括在绝缘层上形成翅片，其中鳍片包括多个侧表面，顶表面和底表面。 该方法还包括在绝缘层上形成栅极，其中栅极在半导体器件的沟道区域具有基本上U形的横截面。
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公开(公告)号：US06833588B2
公开(公告)日：2004-12-21
申请号：US10274867
申请日：2002-10-22
申请人： Bin Yu , Shibly S. Ahmed , Judy Xilin An , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang
发明人： Bin Yu , Shibly S. Ahmed , Judy Xilin An , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang
IPC分类号： H01L2701
CPC分类号： H01L29/785 , H01L29/41733 , H01L29/42384 , H01L29/66795 , H01L29/66803
摘要： A double-gate semiconductor device includes a substrate, an insulating layer, a fin and a gate. The insulating layer is formed on the substrate and the gate is formed on the insulating layer. The fin has a number of side surfaces, a top surface and a bottom surface. The bottom surface and at least a portion of the side surfaces of the fin are surrounded by the gate. The gate material surrounding the fin has a U-shaped cross-section at a channel region of the semiconductor device.
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7.发明授权Source and drain protection and stringer-free gate formation in semiconductor devices 有权半导体器件中的源极和漏极保护和无栅极栅极形成公开(公告)号：US07029959B1
公开(公告)日：2006-04-18
申请号：US10429737
申请日：2003-05-06
CPC分类号： H01L29/785 , H01L29/66545 , H01L29/66795
摘要： A method of manufacturing a semiconductor device may include forming a fin structure on an insulator and depositing a gate material over the fin structure. The method may also include depositing an organic anti-reflective coating on the gate material and forming a gate mask on the organic anti-reflective coating. The organic anti-reflective coating around the gate mask may be removed, and the gate material around the gate mask may be removed to define a gate.
摘要翻译： 制造半导体器件的方法可以包括在绝缘体上形成翅片结构，并在栅极结构上沉积栅极材料。 该方法还可以包括在栅极材料上沉积有机抗反射涂层并在有机抗反射涂层上形成栅极掩模。 可以去除栅极掩模周围的有机抗反射涂层，并且可以去除栅极掩模周围的栅极材料以限定栅极。
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8.发明授权Method using planarizing gate material to improve gate critical dimension in semiconductor devices 有权使用平面化栅极材料来改善半导体器件中的栅极临界尺寸的方法公开(公告)号：US06787439B2
公开(公告)日：2004-09-07
申请号：US10290276
申请日：2002-11-08
申请人： Shibly S. Ahmed , Cyrus E. Tabery , Haihong Wang , Bin Yu
发明人： Shibly S. Ahmed , Cyrus E. Tabery , Haihong Wang , Bin Yu
IPC分类号： H01L213205
CPC分类号： H01L29/42384 , H01L29/66795 , H01L29/785 , H01L29/7853
摘要： A method of manufacturing a semiconductor device may include forming a fin structure on an insulator. The fin structure may include side surfaces and a top surface. The method may also include depositing a gate material over the fin structure and planarizing the deposited gate material. An antireflective coating may be deposited on the planarized gate material, and a gate structure may be formed out of the planarized gate material using the antireflective coating.
摘要翻译： 制造半导体器件的方法可以包括在绝缘体上形成翅片结构。 翅片结构可以包括侧表面和顶表面。 该方法还可以包括在鳍结构上沉积栅极材料并平坦化沉积的栅极材料。 可以在平坦化的栅极材料上沉积抗反射涂层，并且可以使用抗反射涂层从平坦化栅极材料形成栅极结构。
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9.发明授权Planarizing sacrificial oxide to improve gate critical dimension in semiconductor devices 有权平面化牺牲氧化物以改善半导体器件中的栅极临界尺寸公开(公告)号：US07091068B1
公开(公告)日：2006-08-15
申请号：US10310776
申请日：2002-12-06
申请人： Shibly S. Ahmed , Cyrus E. Tabery , Bin Yu
发明人： Shibly S. Ahmed , Cyrus E. Tabery , Bin Yu
IPC分类号： H01L21/00
CPC分类号： H01L29/785 , H01L29/66795
摘要： A method of manufacturing a semiconductor device may include forming a fin structure on an insulator and depositing a gate material over the fin structure. The method may also include forming a sacrificial material over the gate material and planarizing the sacrificial material. An antireflective coating may be deposited on the planarized sacrificial material. A gate structure may then be formed by etching the gate material.
摘要翻译： 制造半导体器件的方法可以包括在绝缘体上形成翅片结构，并在栅极结构上沉积栅极材料。 该方法还可以包括在栅极材料上形成牺牲材料并平坦化牺牲材料。 可以在平坦化的牺牲材料上沉积抗反射涂层。 然后可以通过蚀刻栅极材料形成栅极结构。
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10.发明授权Varying carrier mobility in semiconductor devices to achieve overall design goals 有权在半导体器件中改变载波的移动性，实现总体设计目标公开(公告)号：US07095065B2
公开(公告)日：2006-08-22
申请号：US10633504
申请日：2003-08-05
申请人： Bin Yu , Shibly S. Ahmed , Haihong Wang
发明人： Bin Yu , Shibly S. Ahmed , Haihong Wang
IPC分类号： H01L29/80
CPC分类号： H01L29/785 , H01L27/1203 , H01L29/42392 , H01L29/66795
摘要： A semiconductor device may include a substrate and an insulating layer formed on the substrate. A first device may be formed on the insulating layer, including a first fin. The first fin may be formed on the insulating layer and may have a first fin aspect ratio. A second device may be formed on the insulating layer, including a second fin. The second fin may be formed on the insulating layer and may have a second fin aspect ratio different from the first fin aspect ratio.
摘要翻译： 半导体器件可以包括衬底和形成在衬底上的绝缘层。 第一器件可以形成在绝缘层上，包括第一鳍片。 第一翅片可以形成在绝缘层上，并且可以具有第一翅片长宽比。 第二装置可以形成在绝缘层上，包括第二鳍片。 第二翅片可以形成在绝缘层上，并且可以具有与第一翅片长宽比不同的第二翅片长宽比。
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