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7 条记录 (耗时 0.023 秒)

    Method for forming a gate oxide film of a semiconductor device
    1.
    发明授权
    Method for forming a gate oxide film of a semiconductor device 失效
    用于形成半导体器件的栅极氧化膜的方法

    公开(公告)号：US5210056A

    公开(公告)日：1993-05-11

    申请号：US799052

    申请日：1991-11-27

    申请人： Chil-kun Pong ,  Myeon-koo Kang ,  Yang-koo Lee ,  Dong-ho Shin

    发明人： Chil-kun Pong ,  Myeon-koo Kang ,  Yang-koo Lee ,  Dong-ho Shin

    IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/306 ,  H01L21/316

    CPC分类号： H01L21/28185 ,  H01L21/02046 ,  H01L21/02052 ,  H01L21/28211 ,  Y10S438/906 ,  Y10S438/981

    摘要： A fabrication method of a semiconductor device is disclosed. Particularly, in the process of forming a gate oxide film on a semiconductor substrate, the method for forming a gate oxide film of a semiconductor device comprises the steps of first-annealing the semiconductor substrate in a nitrogen (N.sub.2) atmosphere; forming a gate oxide film by wet-oxidizing the annealed semiconductor substrate at a low temperature in a mixed gas atmosphere of oxygen (O.sub.2) and hydrogen (H.sub.2); and second-annealing the semiconductor substrate where gate oxide film has been formed, at a high temperature in a nitrogen (N.sub.2) atmosphere. Accordingly, the thinning phenomenon of the gate oxide film near the field oxide film is prevented and the instability such V.sub.FB in the conventional field oxidation method is considerably recovered. Also, the field concentration phenomenon is decreased and tolerance to dielectric breakdown is increased.

    摘要翻译： 公开了一种半导体器件的制造方法。 特别是在半导体衬底上形成栅氧化膜的工艺中，形成半导体器件的栅极氧化膜的方法包括以下步骤：在氮（N 2）气氛中对半导体衬底进行退火; 通过在氧气（O 2）和氢气（H 2）的混合气体气氛中在低温下对退火的半导体衬底进行湿氧化来形成栅氧化膜; 并在氮（N 2）气氛中在高温下对形成有栅极氧化膜的半导体衬底进行二次退火。 因此，防止了场氧化膜附近的栅极氧化膜的稀化现象，并且在常规场氧化法中的这种VFB的不稳定性被大大地恢复。 此外，场浓度现象降低，并且介电击穿的耐受性增加。

    Cleaning solution for immersion photolithography system and immersion photolithograph process using the cleaning solution
    2.
    发明申请
    Cleaning solution for immersion photolithography system and immersion photolithograph process using the cleaning solution 审中-公开
    用于浸没光刻系统的清洁溶液和使用清洁溶液的浸渍光刻工艺

    公开(公告)号：US20090117499A1

    公开(公告)日：2009-05-07

    申请号：US12232594

    申请日：2008-09-19

    申请人： Se-yeon Kim ,  Yong-kyun Ko ,  Sang-mi Lee ,  Yang-koo Lee ,  Hun-jung Yi ,  Kun-tack Lee

    发明人： Se-yeon Kim ,  Yong-kyun Ko ,  Sang-mi Lee ,  Yang-koo Lee ,  Hun-jung Yi ,  Kun-tack Lee

    IPC分类号： G03F7/20 ,  C11D3/20

    CPC分类号： G03F7/70925 ,  G03F7/70341

    摘要： A cleaning solution for an immersion photolithography system according to example embodiments may include an ether-based solvent, an alcohol-based solvent, and a semi-aqueous-based solvent. In the immersion photolithography system, a plurality of wafers coated with photoresist films may be exposed pursuant to an immersion photolithography process using an immersion fluid. The area contacted by the immersion fluid during the exposure process may accumulate contaminants. Accordingly, the area contacted by the immersion fluid during the exposure process may be washed with the cleaning solution according to example embodiments so as to reduce or prevent defects in the immersion photolithography system.

    摘要翻译： 根据示例性实施方式的用于浸没式光刻系统的清洁溶液可以包括醚类溶剂，醇类溶剂和半水性溶剂。 在浸没式光刻系统中，可以使用浸没流体根据浸没光刻工艺来曝光涂覆有光致抗蚀剂膜的多个晶片。 在曝光过程中浸入液接触的区域可能会积聚污染物。 因此，可以利用根据示例性实施例的清洗溶液洗涤曝光过程中浸入液接触的区域，以便减少或防止浸没光刻系统中的缺陷。

    Method of forming contact hole and method of manufacturing semiconductor memory device using the same
    3.
    发明申请
    Method of forming contact hole and method of manufacturing semiconductor memory device using the same 审中-公开
    形成接触孔的方法和使用其制造半导体存储器件的方法

    公开(公告)号：US20090130842A1

    公开(公告)日：2009-05-21

    申请号：US12289035

    申请日：2008-10-17

    申请人： Dong-Won Hwang ,  Kook-Joo Kim ,  Yang-koo Lee ,  Hun-Jung Yi

    发明人： Dong-Won Hwang ,  Kook-Joo Kim ,  Yang-koo Lee ,  Hun-Jung Yi

    IPC分类号： H01L21/4763 ,  H01L21/302

    CPC分类号： H01L27/10814 ,  H01L21/31111 ,  H01L21/76804 ,  H01L27/10817 ,  H01L27/10855

    摘要： A contact hole forming method and a method of manufacturing semiconductor device using the same may include forming a layer on a substrate; anisotropically etching the layer to form a dummy contact hole exposing the substrate; isotropically etching a sidewall of the dummy contact hole to form a contact hole by alternatively and repeatedly supplying an etching solution including a fluoride salt in a low-polarity organic solvent and deionized water to the dummy contact hole. The methods increase reliability of semiconductor memory devices.

    摘要翻译： 接触孔形成方法和使用其的半导体器件的制造方法可以包括在衬底上形成层; 各向异性地蚀刻该层以形成暴露该衬底的虚拟接触孔; 各向同性地蚀刻虚拟接触孔的侧壁，通过交替地反复地提供包含氟化物盐在低极性有机溶剂中的蚀刻溶液和去离子水形成接触孔到虚拟接触孔。 这些方法提高了半导体存储器件的可靠性。

    CMOS integrated circuits including source/drain plug
    5.
    发明授权
    CMOS integrated circuits including source/drain plug 失效
    CMOS集成电路包括源极/漏极插头

    公开(公告)号：US06274914B1

    公开(公告)日：2001-08-14

    申请号：US08855024

    申请日：1997-05-13

    申请人： Young-hoon Park ,  Yang-koo Lee ,  Kyung-seok Oh

    发明人： Young-hoon Park ,  Yang-koo Lee ,  Kyung-seok Oh

    IPC分类号： H01L2980

    CPC分类号： H01L27/0928

    摘要： A CMOS integrated circuit includes an NMOS transistor and a PMOS transistor in an integrated circuit substrate. The NMOS transistor and the PMOS transistor each include a gate, and a source/drain on opposing sides of the gate. An insulating layer is located on the integrated circuit substrate. The insulating layer includes a contact hole therein which exposes a portion of a corresponding one of the source/drains. A source/drain plug is formed in the corresponding one of the source/drains. The source/drain plug is of opposite conductivity from the corresponding one of the source/drains. The source/drain plug is centered about the portion of the corresponding one of the source/drains. The source/drain plug may be formed by ion implantation through the contact hole and is thereby self-aligned to the contact hole. The source/drain plug can compensate for misalignment and the diffusion for highly integrated CMOS devices.

    摘要翻译： CMOS集成电路在集成电路基板中包括NMOS晶体管和PMOS晶体管。 NMOS晶体管和PMOS晶体管各自包括栅极，栅极的相对侧上的源极/漏极。 绝缘层位于集成电路基板上。 绝缘层包括其中暴露出源极/漏极中的相应一个的一部分的接触孔。 源/排水塞形成在相应的一个源/排水管中。 源极/漏极插塞与源极/漏极中相应的一个相反。 源极/漏极插头以相应的一个源极/漏极的部分为中心。 源极/漏极插塞可以通过接触孔的离子注入形成，从而与接触孔自对准。 源极/漏极插头可以补偿高度集成的CMOS器件的不对准和扩散。

    Methods for fabricating CMOS integrated circuits including source/drain compensating regions
    6.
    发明授权
    Methods for fabricating CMOS integrated circuits including source/drain compensating regions 有权

    公开(公告)号：US06423589B1

    公开(公告)日：2002-07-23

    申请号：US09885432

    申请日：2001-06-20

    申请人： Young-hoon Park ,  Yang-koo Lee ,  Kyung-seok Oh

    发明人： Young-hoon Park ,  Yang-koo Lee ,  Kyung-seok Oh

    IPC分类号： H01L21828

    摘要： A CMOS integrated circuit includes an NMOS transistor and a PMOS transistor in an integrated circuit substrate. The NMOS transistor and the PMOS transistor each include a gate, and a source/drain on opposing sides of the gate. An insulating layer is located on the integrated circuit substrate. The insulating layer includes a contact hole therein which exposes a portion of a corresponding one of the source/drains. A source/drain plug is formed in the corresponding one of the source/drains. The source/drain plug is of opposite conductivity from the corresponding one of the source/drains. The source/drain plug is centered about the portion of the corresponding one of the source/drains. The source/drain plug may be formed by ion implantation through the contact hole and is thereby self-aligned to the contact hole. The source/drain plug can compensate for misalignment and the diffusion for highly integrated CMOS devices.

    Diffusion system having air curtain formation function for manufacturing semiconductor devices and method of controlling the same
    7.
    发明授权
    Diffusion system having air curtain formation function for manufacturing semiconductor devices and method of controlling the same 失效
    具有用于制造半导体器件的气幕形成功能的扩散系统及其控制方法

    公开(公告)号：US06302962B1

    公开(公告)日：2001-10-16

    申请号：US09336751

    申请日：1999-06-21

    申请人： Ki-heum Nam ,  Yang-koo Lee

    发明人： Ki-heum Nam ,  Yang-koo Lee

    IPC分类号： C23C1600

    CPC分类号： H01L21/67017 ,  C30B31/12

    摘要： A diffusion system for manufacturing semiconductor devices has an air curtain formed across a furnace opening for preventing the loss of heat energy from inside the furnace. The diffusion system includes the furnace having an opening through which a wafer boat having a plurality of wafers is loaded/unloaded; an air curtain apparatus for spraying a gas across the opening so as to form an air curtain cutting off the atmosphere inside of the furnace from the outside environment; and a controlling unit for controlling the air curtain apparatus by applying on/off signals to the air curtain apparatus. The diffusion system is controlled by the controlling unit so as to form the air curtain at the opening of the furnace while the wafer boat moves in and out of the furnace. After the wafer boat is completely loaded into the furnace, the air curtain is removed.

    摘要翻译： 用于制造半导体器件的扩散系统具有形成在炉开口上的气幕，用于防止炉内的热能损失。 扩散系统包括具有开口的炉子，通过该开口装载/卸载具有多个晶片的晶片舟皿; 用于将气体喷射穿过所述开口以形成从所述外部环境切断所述炉内的气氛的气帘的气幕装置; 以及控制单元，用于通过向气幕装置施加开/关信号来控制气幕装置。 扩散系统由控制单元控制，以便在晶片舟移入和移出炉内时在炉的开口处形成气幕。 在晶圆舟完全装入炉中之后，将空气幕移除。