公开(公告)号：US20170331486A1

公开(公告)日：2017-11-16

申请号：US15521178

申请日：2015-05-21

申请人： China Electronic Technology Corporation, 24th Research Institute

发明人： Dai-Guo Xu ,  Shi-Liu Xu ,  Gang-Yi Hu ,  Guang-Bing Chen ,  Jian-An Wang

IPC分类号： H03M1/08 ,  H03M1/10 ,  H03M1/20 ,  H03M1/28

CPC分类号： H03M1/0809 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1023 ,  H03M1/12 ,  H03M1/144 ,  H03M1/204 ,  H03M1/282

摘要： The present invention pertains to a high-speed successive approximation analog-to-digital converter of two bits per circle, includes three switches, two capacitor arrays, three comparators, an encoding circuit, a first switch array corresponding to the first capacitor array, a second switch array corresponding to the second capacitor array, a shifting register and a digital correction unit. The analog-to-digital converter, featuring doubled speed, realizes a successive approximation process without any fault when a high-bit large capacitor is unsettled. Thus no redundancy bit capacitor is required to compensate for unsettled pre-stage large capacitor. By using the encoding circuit, a thermometer code is converted into a binary code effectively, and inherent errors of comparators are reduced by the randomization of three comparators.

公开(公告)号：US10666243B2

公开(公告)日：2020-05-26

申请号：US16475123

申请日：2016-07-07

申请人： CHINA ELECTRONIC TECHNOLOGY CORPORATION, 24TH RESEARCH INSTITUTE

发明人： Dai-Guo Xu ,  Gang-Yi Hu ,  Ru-Zhang Li ,  Jian-An Wang ,  Guang-Bing Chen ,  Yu-Xin Wang ,  Dong-Bing Fu ,  Tao Liu

IPC分类号： H03K5/00 ,  H03K5/24 ,  H03K19/00 ,  H03K19/003

摘要： A high-speed low-power-consumption dynamic comparator includes a latch, an AND gate, a delay unit, and an XNOR gate. According to the high-speed low-power-consumption dynamic comparator, the output signal is generated through the XNOR gate from the comparator output signals Dp and Dn. The output signal and the control signal clk1 generate the control signal of the NMOS transistor P10 through the AND gate, so that the problem of static power consumption in a conventional comparator is solved.

公开(公告)号：US09966967B2

公开(公告)日：2018-05-08

申请号：US15521178

申请日：2015-05-21

申请人： China Electronic Technology Corporation, 24th Research Institute

发明人： Dai-Guo Xu ,  Shi-Liu Xu ,  Gang-Yi Hu ,  Guang-Bing Chen ,  Jian-An Wang

IPC分类号： H03M1/12 ,  H03M1/08 ,  H03M1/20 ,  H03M1/28 ,  H03M1/10 ,  H03M1/06 ,  H03M1/00

CPC分类号： H03M1/0809 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1023 ,  H03M1/12 ,  H03M1/144 ,  H03M1/204 ,  H03M1/282

摘要： A high-speed successive approximation analog-to-digital converter of two bits per cycle, includes three switches, two capacitor arrays, three comparators, an encoding circuit, a first switch array corresponding to the first capacitor array, a second switch array corresponding to the second capacitor array, a shifting register and a digital correction unit. The analog-to-digital converter, featuring doubled speed, realizes a successive approximation process without any fault when a high-bit large capacitor is unsettled. Thus no redundancy bit capacitor is required to compensate for unsettled pre-stage large capacitor. By using the encoding circuit, a thermometer code is converted into a binary code effectively, and inherent errors of comparators are reduced by the randomization of three comparators.