SYNCHRONIZATION CONTROL APPARATUS AND METHOD
    1.
    发明申请
    SYNCHRONIZATION CONTROL APPARATUS AND METHOD 有权
    同步控制装置和方法

    公开(公告)号:US20060197758A1

    公开(公告)日:2006-09-07

    申请号:US11306195

    申请日:2005-12-19

    Abstract: A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.

    Abstract translation: 用于以隔行扫描模式驱动显示模块的同步控制装置包括:用于延迟输入垂直同步(IVS)信号以产生延迟信号的延迟电路; 以及耦合到延迟电路的多路复用器,用于根据奇数/偶数场指示信号选择IVS信号和延迟信号中的一个,以产生输出垂直同步(OVS)信号。

    Circuit for updating firmware of display apparatus and method thereof
    2.
    发明授权
    Circuit for updating firmware of display apparatus and method thereof 有权
    用于更新显示装置的固件的电路及其方法

    公开(公告)号:US08375378B2

    公开(公告)日:2013-02-12

    申请号:US11832927

    申请日:2007-08-02

    CPC classification number: G06F8/65

    Abstract: The present invention relates to a circuit for updating firmware of a display apparatus and a method thereof. An optional update unit may be used for initializing the updating process. The first firmware information of the first display apparatus is transmitted to the second display apparatus for updating the second firmware information of the second display apparatus. Hence, reliability is enhanced and problems of incompatibility will not occur. In addition, no extra burning devices will be necessary, thus reducing extra cost.

    Abstract translation: 本发明涉及一种用于更新显示装置的固件的电路及其方法。 可选的更新单元可用于初始化更新过程。 将第一显示装置的第一固件信息发送到第二显示装置,以更新第二显示装置的第二固件信息。 因此,可靠性得到提高,不兼容的问题不会发生。 另外,不需要额外的燃烧装置,从而减少额外的成本。

    Synchronization control apparatus and method
    3.
    发明授权
    Synchronization control apparatus and method 有权
    同步控制装置及方法

    公开(公告)号:US07623185B2

    公开(公告)日:2009-11-24

    申请号:US11306195

    申请日:2005-12-19

    Abstract: A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.

    Abstract translation: 用于以隔行扫描模式驱动显示模块的同步控制装置包括:用于延迟输入垂直同步(IVS)信号以产生延迟信号的延迟电路; 以及耦合到延迟电路的多路复用器,用于根据奇数/偶数场指示信号选择IVS信号和延迟信号中的一个,以产生输出垂直同步(OVS)信号。

    DISPLAY APPARATUS CAPABLE OF PREVENTING FIRMWARE UPDATE FAILURE AND METHOD THEREOF
    4.
    发明申请
    DISPLAY APPARATUS CAPABLE OF PREVENTING FIRMWARE UPDATE FAILURE AND METHOD THEREOF 审中-公开
    显示装置可防止固件更新失败及其方法

    公开(公告)号:US20070165040A1

    公开(公告)日:2007-07-19

    申请号:US11621119

    申请日:2007-01-09

    CPC classification number: G06F11/1433

    Abstract: The invention relates to a display apparatus and related method thereof capable of preventing firmware updating failure. The display apparatus includes a first memory block for storing a first firmware; a second memory block for storing a second firmware; and a micro controller unit coupled to the first memory block and the second memory block for accessing and executing the first firmware or the second firmware to control the operation of the display apparatus.

    Abstract translation: 本发明涉及能够防止固件更新失败的显示装置及其相关方法。 显示装置包括用于存储第一固件的第一存储块; 用于存储第二固件的第二存储器块; 以及耦合到第一存储器块和第二存储器块的微控制器单元,用于访问和执行第一固件或第二固件以控制显示装置的操作。

    Define overlay dummy pattern in mark shielding region to reduce wafer scale error caused by metal deposition
    5.
    发明授权
    Define overlay dummy pattern in mark shielding region to reduce wafer scale error caused by metal deposition 失效
    在标记屏蔽区域中定义覆盖虚拟图案,以减少由金属沉积引起的晶片刻度误差

    公开(公告)号:US06838217B1

    公开(公告)日:2005-01-04

    申请号:US10163709

    申请日:2002-06-06

    CPC classification number: G03F7/70633

    Abstract: A new method is provided for the creation of a dummy pattern. A typical wafer exposure mask contains a Clear Out Window (CLWD) pattern, this CLWD pattern is of no value during the process of shielding the area on the surface of the wafer where the alignment mark must be placed. This CLWD can therefore be used to create a dummy overlay pattern, resulting in a reduction in the wafer scaling error that typically occurs as a result of metal deposition. For the same reasons, a dummy overlay pattern can also be created in the scribe lines of the wafer surface.

    Abstract translation: 提供了一种用于创建虚拟图案的新方法。 典型的晶片曝光掩模包含清除窗口(CLWD)图案,在屏蔽必须放置对准标记的晶片表面上的区域的过程中,该CLWD图案是没有价值的。 因此,该CLWD可以用于创建虚拟覆盖图案,导致通常由于金属沉积而发生的晶片缩放误差的减小。 由于相同的原因,也可以在晶片表面的划线中创建虚拟覆盖图案。

    Method and apparatus for DC level redistribution
    6.
    发明授权
    Method and apparatus for DC level redistribution 有权
    用于直流电平再分配的方法和装置

    公开(公告)号:US08446405B2

    公开(公告)日:2013-05-21

    申请号:US12562113

    申请日:2009-09-17

    CPC classification number: G09G5/006 H04N5/185

    Abstract: A DC level redistribution method includes the steps of: receiving all positive signals and one negative signal of a plurality of pairs of differential signals; fixing a DC level of a positive signal of a designated pair of differential signals among a plurality of pairs of differential signals as a reference in order to adjust a DC level of a negative signal of the designated pair of differential signals for generating an adjusted negative signal; and taking the adjusted negative signal of the designated pair of differential signals as a reference in order to adjust DC levels of the positive signals of the other pairs of differential signals excluding the designated pair of differential signals. The DC redistribution method may be used in a display system.

    Abstract translation: DC电平再分配方法包括以下步骤:接收多对差分信号的所有正信号和一个负信号; 将多对差分信号中指定的一对差分信号的正信号的DC电平固定为参考,以便调整所指定的一对差分信号的负信号的DC电平,以产生经调整的负信号 ; 并且将所指定的差分信号对的经调整的负信号作为参考,以便调整除指定的差分信号对之外的其它对差分信号的正信号的DC电平。 DC再分配方法可以用在显示系统中。

    Apparatus for digitally filtering a video signal, and related method
    7.
    发明授权
    Apparatus for digitally filtering a video signal, and related method 有权
    用于数字滤波视频信号的装置及相关方法

    公开(公告)号:US07978268B2

    公开(公告)日:2011-07-12

    申请号:US11467163

    申请日:2006-08-25

    CPC classification number: H04N5/21 H04N5/142

    Abstract: A method for digitally filtering a video signal comprises: converting the video signal into a plurality of sampled values; determining whether distribution of at least one portion of the sampled values belongs to one of a plurality of specific types according to the sampled values; and generating a plurality of output values according to a correction operation corresponding to the one of the specific types.

    Abstract translation: 用于对视频信号进行数字滤波的方法包括:将视频信号转换为多个采样值; 确定所述采样值的至少一部分的分布是否根据所述采样值属于多个特定类型之一; 以及根据与所述特定类型之一相对应的校正操作生成多个输出值。

    Tape out template system and method
    8.
    发明授权
    Tape out template system and method 有权
    剥离模板系统和方法

    公开(公告)号:US07539554B2

    公开(公告)日:2009-05-26

    申请号:US11397916

    申请日:2006-04-04

    CPC classification number: G06F17/50 G06Q10/087

    Abstract: A tape out template system is provided. The tape out template system comprises a template database, a query database, and a processor. The template database stores a plurality of templates for mask tooling for different manufacturing technologies. Each of the templates comprises a set of mask tooling settings for different manufacturing processes of one of the manufacturing technologies. The query database stores a hierarchy of queries addressing differences among mask tooling information of the manufacturing processes. The processor receives technology information specifying the manufacturing technology of the tape out request, selects one of the templates according to the received technology information, selects and presents at least one of the queries according to the selected template, and determines values of the mask tooling settings according to the answers to the presented queries.

    Abstract translation: 提供了一个磁带模板系统。 磁带输出模板系统包括模板数据库,查询数据库和处理器。 模板数据库存储用于不同制造技术的掩模工具的多个模板。 每个模板包括用于制造技术之一的不同制造过程的一组掩模工具设置。 查询数据库存储解决制造过程的掩模加工信息之间差异的查询的层次结构。 处理器接收指定磁带出请求的制造技术的技术信息,根据接收到的技术信息选择一个模板,根据选择的模板选择和呈现至少一个查询,并确定掩模工具设置的值 根据提出的查询的答案。

    Analog front end device with temperature compensation
    9.
    发明申请
    Analog front end device with temperature compensation 有权
    带温度补偿的模拟前端设备

    公开(公告)号:US20080008267A1

    公开(公告)日:2008-01-10

    申请号:US11822363

    申请日:2007-07-05

    CPC classification number: H04L27/0002

    Abstract: An analog front end device with temperature compensation is provided. The analog front end device comprises a bandgap voltage reference circuit, a clock generator, a temperature compensation circuit, one to three identical converting circuits and a Sync-on-Green circuit. The temperature compensation circuit is adapted to sense the temperature variations of the analog front end device and dynamically compensate the bandgap voltage reference circuit, the clock generator and the Sync-on-Green circuit as the temperature varies, which thereby controls the thermal drift in the analog front end device.

    Abstract translation: 提供具有温度补偿的模拟前端设备。 模拟前端装置包括带隙电压参考电路,时钟发生器,温度补偿电路,一到三个相同的转换电路和同步在绿色电路。 温度补偿电路适用于感测模拟前端器件的温度变化,并随着温度变化动态补偿带隙电压参考电路,时钟发生器和同步绿色电路,从而控制温度补偿电路中的热漂移 模拟前端设备。

    Sync signal acquisition device
    10.
    发明申请
    Sync signal acquisition device 有权
    同步信号采集装置

    公开(公告)号:US20080007656A1

    公开(公告)日:2008-01-10

    申请号:US11822392

    申请日:2007-07-05

    CPC classification number: H04N5/08 H04N5/185 H04N9/44

    Abstract: A sync signal acquisition device is disclosed which comprises a transistor, a resistor, a clamper, an analog multiplexer and a comparator. While operating in a composite HS mode, prior to the generation of the sync signal HS, the invention uses a conventional circuit to extract a composite sync signal at start-up, thereby allowing related circuits to generate the sync signal HS and a clamping signal. Then, a mode selecting signal is used to disable the automatic clamping mode and switch the analog multiplexer to a forced clamping mode. At this point, the output voltage of the damper is set by a user instead of process; accordingly, the DC voltage level is more controllable, but not subject to drift due to process changes or temperature changes.

    Abstract translation: 公开了一种同步信号采集装置,其包括晶体管,电阻器,钳位器,模拟多路复用器和比较器。 当在复合HS模式下操作时,在产生同步信号HS之前,本发明使用常规电路在启动时提取复合同步信号,从而允许相关电路产生同步信号HS和钳位信号。 然后,使用模式选择信号来禁用自动钳位模式并将模拟多路复用器切换到强制钳位模式。 此时,阻尼器的输出电压由使用者而不是过程设定; 因此,直流电压电平更可控,但由于过程变化或温度变化而不会发生漂移。

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