Abstract:
A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.
Abstract:
The present invention relates to a circuit for updating firmware of a display apparatus and a method thereof. An optional update unit may be used for initializing the updating process. The first firmware information of the first display apparatus is transmitted to the second display apparatus for updating the second firmware information of the second display apparatus. Hence, reliability is enhanced and problems of incompatibility will not occur. In addition, no extra burning devices will be necessary, thus reducing extra cost.
Abstract:
A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.
Abstract:
The invention relates to a display apparatus and related method thereof capable of preventing firmware updating failure. The display apparatus includes a first memory block for storing a first firmware; a second memory block for storing a second firmware; and a micro controller unit coupled to the first memory block and the second memory block for accessing and executing the first firmware or the second firmware to control the operation of the display apparatus.
Abstract:
A new method is provided for the creation of a dummy pattern. A typical wafer exposure mask contains a Clear Out Window (CLWD) pattern, this CLWD pattern is of no value during the process of shielding the area on the surface of the wafer where the alignment mark must be placed. This CLWD can therefore be used to create a dummy overlay pattern, resulting in a reduction in the wafer scaling error that typically occurs as a result of metal deposition. For the same reasons, a dummy overlay pattern can also be created in the scribe lines of the wafer surface.
Abstract:
A DC level redistribution method includes the steps of: receiving all positive signals and one negative signal of a plurality of pairs of differential signals; fixing a DC level of a positive signal of a designated pair of differential signals among a plurality of pairs of differential signals as a reference in order to adjust a DC level of a negative signal of the designated pair of differential signals for generating an adjusted negative signal; and taking the adjusted negative signal of the designated pair of differential signals as a reference in order to adjust DC levels of the positive signals of the other pairs of differential signals excluding the designated pair of differential signals. The DC redistribution method may be used in a display system.
Abstract:
A method for digitally filtering a video signal comprises: converting the video signal into a plurality of sampled values; determining whether distribution of at least one portion of the sampled values belongs to one of a plurality of specific types according to the sampled values; and generating a plurality of output values according to a correction operation corresponding to the one of the specific types.
Abstract:
A tape out template system is provided. The tape out template system comprises a template database, a query database, and a processor. The template database stores a plurality of templates for mask tooling for different manufacturing technologies. Each of the templates comprises a set of mask tooling settings for different manufacturing processes of one of the manufacturing technologies. The query database stores a hierarchy of queries addressing differences among mask tooling information of the manufacturing processes. The processor receives technology information specifying the manufacturing technology of the tape out request, selects one of the templates according to the received technology information, selects and presents at least one of the queries according to the selected template, and determines values of the mask tooling settings according to the answers to the presented queries.
Abstract:
An analog front end device with temperature compensation is provided. The analog front end device comprises a bandgap voltage reference circuit, a clock generator, a temperature compensation circuit, one to three identical converting circuits and a Sync-on-Green circuit. The temperature compensation circuit is adapted to sense the temperature variations of the analog front end device and dynamically compensate the bandgap voltage reference circuit, the clock generator and the Sync-on-Green circuit as the temperature varies, which thereby controls the thermal drift in the analog front end device.
Abstract:
A sync signal acquisition device is disclosed which comprises a transistor, a resistor, a clamper, an analog multiplexer and a comparator. While operating in a composite HS mode, prior to the generation of the sync signal HS, the invention uses a conventional circuit to extract a composite sync signal at start-up, thereby allowing related circuits to generate the sync signal HS and a clamping signal. Then, a mode selecting signal is used to disable the automatic clamping mode and switch the analog multiplexer to a forced clamping mode. At this point, the output voltage of the damper is set by a user instead of process; accordingly, the DC voltage level is more controllable, but not subject to drift due to process changes or temperature changes.