公开(公告)号：US20050093723A1

公开(公告)日：2005-05-05

申请号：US10912179

申请日：2004-08-06

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： H03M1/10

CPC分类号： H03M1/109 ,  H03M1/12

摘要： A built-in-self-test apparatus for an analog-to-digital converter includes a digital-to-analog converter, a low-pass filter, a histogram analyzer and a software engine. The digital-to-analog converter is intended to generate a first signal. The low-pass filter is intended to smoothen the first signal so that an analog-to-digital converter can perform sampling on the smoothened first signal by a second signal, wherein the bit number of the second signal is greater than or equal to that of the first signal, and the frequency of the second signal is a multiple of that of the first signal. The histogram analyzer is electrically connected to the output end of the analog-to-digital converter. The software engine is electrically connected to the output end of the histogram analyzer so as to display the characteristics of the analog-to-digital converter.

摘要翻译： 用于模数转换器的内置自检装置包括数模转换器，低通滤波器，直方图分析器和软件引擎。 数模转换器旨在产生第一信号。 低通滤波器旨在平滑第一信号，使得模数转换器可以通过第二信号对平滑的第一信号执行采样，其中第二信号的位数大于或等于 第一信号，第二信号的频率是第一信号的倍数。 直方图分析仪电连接到模数转换器的输出端。 软件引擎电连接到直方图分析仪的输出端，以显示模数转换器的特性。

公开(公告)号：US20050035750A1

公开(公告)日：2005-02-17

申请号：US10910342

申请日：2004-08-04

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： G01R31/3167 ,  G01R31/3187 ,  H03M1/10 ,  H03M1/66 ,  G01R13/02

CPC分类号： G01R31/3187 ,  G01R31/3167 ,  H03M1/1095 ,  H03M1/66

摘要： A built-in self-test apparatus for a digital-to-analog converter uses a differentiation unit for differentiating a digital-to-analog (DA) signal to obtain the differences between pulses of the analog signal. Next, the analog signal is converted into a digital signal in the light of a threshold voltage by a Schmitt trigger unit. Then, the duty cycles of the digital signal are calculated by a duty cycle retriever, and transmitted into a signature analyzer to calculate the differential non-linearity for error analysis. For processing a high-speed DA signal, the circuit disposed before the differentiation unit may use a test pattern unit, a sample-and-hold circuit and a logic circuit to lower the speed of the DA signal.

摘要翻译： 用于数模转换器的内置自检装置使用微分单元来区分数模（DA）信号以获得模拟信号的脉冲之间的差异。 接下来，模拟信号通过施密特触发器单元根据阈值电压被转换为数字信号。 然后，数字信号的占空比由占空比检索器计算，并发送到签名分析器中以计算误差分析的差分非线性。 为了处理高速DA信号，设置在差分单元之前的电路可以使用测试图案单元，采样保持电路和逻辑电路来降低DA信号的速度。

公开(公告)号：US06906651B2

公开(公告)日：2005-06-14

申请号：US10758841

申请日：2004-01-16

申请人： Ching Hsiang Yang ,  Chun Wei Lin

发明人： Ching Hsiang Yang ,  Chun Wei Lin

IPC分类号： G05F3/26 ,  H03K17/041 ,  H03M1/66

CPC分类号： G05F3/262 ,  H03K17/04106

摘要： A constant current source with threshold voltage and channel length modulation includes first, second, third, fourth and fifth MOS transistors. Each of the MOS transistors has gate, first and second terminals. The first terminal of the second MOS transistor is coupled to loading impedance, and its second terminal is coupled with the first terminal of the first MOS transistor. The gate terminal and first terminal of the third MOS transistor are together coupled to the gate terminal of the second MOS transistor, and its second terminal is coupled to the first terminal of the fourth MOS transistor. The gate terminal and first terminal of the fourth MOS transistor are coupled to the gate terminal of the first MOS transistor, and its second terminal is coupled to a first reference voltage. The gate terminal and second terminal of the fifth MOS transistor are respectively coupled to a second reference voltage and a third reference voltage, and its first terminal is coupled to the gate terminal and first terminal of the third MOS transistor.

摘要翻译： 具有阈值电压和沟道长度调制的恒流源包括第一，第二，第三，第四和第五MOS晶体管。 每个MOS晶体管具有栅极，第一和第二端子。 第二MOS晶体管的第一端子耦合到负载阻抗，并且其第二端子与第一MOS晶体管的第一端子耦合。 第三MOS晶体管的栅极端子和第一端子一起耦合到第二MOS晶体管的栅极端子，并且其第二端子耦合到第四MOS晶体管的第一端子。 第四MOS晶体管的栅极端子和第一端子耦合到第一MOS晶体管的栅极端子，并且其第二端子耦合到第一参考电压。 第五MOS晶体管的栅极端子和第二端子分别耦合到第二参考电压和第三参考电压，并且其第一端子耦合到第三MOS晶体管的栅极端子和第一端子。

公开(公告)号：US20050068210A1

公开(公告)日：2005-03-31

申请号：US10770548

申请日：2004-02-04

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： H03M1/00 ,  H03M1/10

CPC分类号： H03M1/109 ,  H03M1/1095 ,  H03M1/12

摘要： The present apparatus for measuring data converter comprises a digital-to-analog converter, a multiplexer, a histogram analyzer and a software engine. The digital-to-analog converter is intended to generate uniform pseudo-random signals. The multiplexer selects an output of the digital-to-analog converter or an external analog input signal and sends it to a data converter under test. The histogram analyzer is electrically connected to the output of the data converter under test, so as to display the frequency of the appearance of various codes of the converter. The software engine is electrically connected to the output of the histogram analyzer, so as to display the characteristics of the data converter under test.

摘要翻译： 本发明的用于测量数据转换器的装置包括数模转换器，多路复用器，直方图分析器和软件引擎。 数模转换器旨在产生均匀的伪随机信号。 多路复用器选择数模转换器的输出或外部模拟输入信号，并将其发送到被测数据转换器。 直方图分析仪电连接到被测数据转换器的输出端，以显示转换器各种代码的出现频率。 软件引擎与直方图分析仪的输出电连接，以显示被测数据转换器的特性。

公开(公告)号：US20210395946A1

公开(公告)日：2021-12-23

申请号：US17340135

申请日：2021-06-07

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： D06N3/14 ,  B32B27/12 ,  B32B5/02 ,  B32B7/12 ,  B32B27/30 ,  B32B27/40 ,  D06N3/00

摘要： Provided is a synthetic leather. The synthetic leather comprises a base cloth, a polymer layer formed on the base cloth and a surface unit covering the polymer layer; the surface unit is a functional layer or a combination of the functional layer and a print layer. The polymer layer is made of a PVB-based composition and excludes a crosslinking agent with at least one isocyanate group. The functional layer is made of a material containing a primary agent; the primary agent is PU, epoxy resin, PMA or PVB; when the primary agent is the PVB, the material further comprises a crosslinking agent with at least one isocyanate group. The synthetic leather has good properties of weather resistance, abrasion resistance and flexing resistance, and the synthetic leather can have a variety of printing patterns on its surface.

公开(公告)号：US20210277541A1

公开(公告)日：2021-09-09

申请号：US17188800

申请日：2021-03-01

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： D01F8/16 ,  D01F8/14 ,  D01F8/12 ,  D01F8/08 ,  D01F1/10

摘要： Provided is a composite yarn. The composite yarn includes a core and a sheath. The core is made of a thermoplastic material; wherein the thermoplastic material is selected from a group consisting of: a polyester, a polyamide, a polyacrylonitrile and any combination thereof. The sheath formed around the core is made of a cladding material, and the cladding material comprises polyvinyl butyral; wherein the polyvinyl butyral has a melt flow rate ranging from 2 g/10 min to 35 g/10 min; the melt flow rate is measured by a standard method ASTM D1238 at 190° C. with 2.16 kg load.

公开(公告)号：US07355537B2

公开(公告)日：2008-04-08

申请号：US10910342

申请日：2004-08-04

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： H03M1/10

CPC分类号： G01R31/3187 ,  G01R31/3167 ,  H03M1/1095 ,  H03M1/66

摘要： A built-in self-test apparatus for a digital-to-analog converter uses a differentiation unit for differentiating a digital-to-analog (DA) signal to obtain the differences between pulses of the analog signal. Next, the analog signal is converted into a digital signal in the light of a threshold voltage by a Schmitt trigger unit. Then, the duty cycles of the digital signal are calculated by a duty cycle retriever, and transmitted into a signature analyzer to calculate the differential non-linearity for error analysis. For processing a high-speed DA signal, the circuit disposed before the differentiation unit may use a test pattern unit, a sample-and-hold circuit and a logic circuit to lower the speed of the DA signal.

摘要翻译： 用于数模转换器的内置自检装置使用微分单元来区分数模（DA）信号以获得模拟信号的脉冲之间的差异。 接下来，模拟信号通过施密特触发器单元根据阈值电压被转换为数字信号。 然后，数字信号的占空比由占空比检索器计算，并发送到签名分析器中以计算误差分析的差分非线性。 为了处理高速DA信号，设置在差分单元之前的电路可以使用测试图案单元，采样保持电路和逻辑电路来降低DA信号的速度。

公开(公告)号：US07015846B2

公开(公告)日：2006-03-21

申请号：US10919372

申请日：2004-08-17

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： G05F3/16

CPC分类号： G05F3/267

摘要： A constant current source with threshold voltage and channel length modulation comprises a set of cascade transistors and a compensation circuit electrically connected to the set of cascade transistors so as to form a feedback circuit, in which the set of cascade transistors including a first MOS transistor and a second MOS transistor, and the compensation circuit comprises a third MOS transistor, a fourth MOS transistor, a sixth MOS transistor and a seventh MOS transistor. The gate terminal of the third MOS transistor is connected to the gate terminal of the second MOS transistor. The fourth MOS transistor is connected to the third MOS transistor in serial, and the gate terminal of the fourth MOS transistor is connected to the gate terminal of the first MOS transistor, and the second terminal of the fourth MOS transistor is connected to a current-supplying circuit. The gate terminals of the sixth and seventh MOS transistors are electrically connected to the current-supplying circuit, and a current is generated by mirroring flows through the third MOS transistor.

摘要翻译： 具有阈值电压和沟道长度调制的恒流源包括一组级联晶体管和与该组级联晶体管电连接的补偿电路，以便形成反馈电路，其中该组级联晶体管包括第一MOS晶体管和 第二MOS晶体管，并且所述补偿电路包括第三MOS晶体管，第四MOS晶体管，第六MOS晶体管和第七MOS晶体管。 第三MOS晶体管的栅极端子连接到第二MOS晶体管的栅极端子。 第四MOS晶体管串联连接到第三MOS晶体管，第四MOS晶体管的栅极端子连接到第一MOS晶体管的栅极端子，第四MOS晶体管的第二端子连接到电流 - 供电电路。 第六和第七MOS晶体管的栅极端子电连接到电流供应电路，并且通过镜像流过第三MOS晶体管产生电流。

公开(公告)号：US06987472B2

公开(公告)日：2006-01-17

申请号：US10912179

申请日：2004-08-06

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： H03M1/10 ,  G06F101/14 ,  G06F15/00 ,  G06F17/18

CPC分类号： H03M1/109 ,  H03M1/12

摘要： A built-in-self-test apparatus for an analog-to-digital converter includes a digital-to-analog converter, a low-pass filter, a histogram analyzer and a software engine. The digital-to-analog converter is intended to generate a first signal. The low-pass filter is intended to smoothen the first signal so that an analog-to-digital converter can perform sampling on the smoothened first signal by a second signal, wherein the bit number of the second signal is greater than or equal to that of the first signal, and the frequency of the second signal is a multiple of that of the first signal. The histogram analyzer is electrically connected to the output end of the analog-to-digital converter. The software engine is electrically connected to the output end of the histogram analyzer so as to display the characteristics of the analog-to-digital converter.

摘要翻译： 用于模数转换器的内置自检装置包括数模转换器，低通滤波器，直方图分析器和软件引擎。 数模转换器旨在产生第一信号。 低通滤波器旨在平滑第一信号，使得模数转换器可以通过第二信号对平滑的第一信号执行采样，其中第二信号的位数大于或等于 第一信号，第二信号的频率是第一信号的倍数。 直方图分析仪电连接到模数转换器的输出端。 软件引擎电连接到直方图分析仪的输出端，以显示模数转换器的特性。

公开(公告)号：US06652050B2

公开(公告)日：2003-11-25

申请号：US10123193

申请日：2002-04-17

申请人： Chun Wei Lin

发明人： Chun Wei Lin

IPC分类号： A47B8800

CPC分类号： A47B88/467

摘要： A drawer-sliding device. The device includes an outer sliding member fastened with a cabinet or the like. A middle sliding member is mounted slidably in the outer sliding member, and an inner sliding member is fastened with the drawer and mounted slidably in the middle sliding member. The inner sliding member is provided with a coupling element. The outer sliding member is provided with a fast return element and a spring element. When the inner sliding member and the drawer are drawn out, the coupling element of the inner sliding member is engaged with the fast return element so as to bring about an outward displacement of the fast return element, thereby resulting in deformation of the spring element. When the inner sliding member is pushed back into place along with the drawer, the fast return element and the coupling element are forced by the spring element to move back into place.

摘要翻译： 抽屉滑动装置。 该装置包括用机壳等固定的外滑动构件。 中间滑动构件可滑动地安装在外部滑动构件中，并且内部滑动构件与抽屉紧固并可滑动地安装在中间滑动构件中。 内部滑动构件设置有联接元件。 外部滑动构件设置有快速返回元件和弹簧元件。 当内部滑动构件和抽屉被拉出时，内部滑动构件的联接元件与快速返回元件接合，从而引起快速返回元件的向外移位，从而导致弹簧元件的变形。 当内部滑动构件与抽屉一起被推回到位时，快速返回元件和联接元件被弹簧元件迫使其移回到位。