公开(公告)号：US08411509B2

公开(公告)日：2013-04-02

申请号：US11976975

申请日：2007-10-30

申请人： Chun-Yi Lee ,  Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Chun-Yi Lee ,  Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C11/34

CPC分类号： G11C8/08 ,  G11C8/14 ,  G11C16/08

摘要： A memory and method for charging a word line thereof are disclosed. The memory includes a first word line driver, a first word line and a first switch. The first word line driver is connected to a first operational voltage for receiving a first control signal. The first word line comprises a start terminal connected to an output terminal of the first word line driver. The first switch is connected to a second operational voltage and an end terminal of the first word line. The second operational voltage is not smaller than the first operational voltage. When the first word line driver is controlled by the first control signal to start charging up the first word line, the first switch is simultaneously turned on to provide another charging path for the first word line until the first word line is charged to the first operational voltage.

公开(公告)号：US20090116293A1

公开(公告)日：2009-05-07

申请号：US11976975

申请日：2007-10-30

申请人： Chun-Yi Lee ,  Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Chun-Yi Lee ,  Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C16/06 ,  G11C8/08 ,  G11C5/02

CPC分类号： G11C8/08 ,  G11C8/14 ,  G11C16/08

摘要： A memory and method for charging a word line thereof are disclosed. The memory includes a first word line driver, a first word line and a first switch. The first word line driver is connected to a first operational voltage for receiving a first control signal. The first word line comprises a start terminal connected to an output terminal of the first word line driver. The first switch is connected to a second operational voltage and an end terminal of the first word line. The second operational voltage is not smaller than the first operational voltage. When the first word line driver is controlled by the first control signal to start charging up the first word line, the first switch is simultaneously turned on to provide another charging path for the first word line until the first word line is charged to the first operational voltage.

摘要翻译： 公开了一种用于对其字线进行充电的存储器和方法。 存储器包括第一字线驱动器，第一字线和第一开关。 第一字线驱动器连接到用于接收第一控制信号的第一操作电压。 第一字线包括连接到第一字线驱动器的输出端的起始端。 第一开关连接到第一字线的第二工作电压和端子。 第二工作电压不小于第一工作电压。 当第一字线驱动器由第一控制信号控制以开始向第一字线充电时，第一开关同时导通，以为第一字线提供另一充电路径，直到第一字线被充电到第一操作 电压。

公开(公告)号：US08264900B2

公开(公告)日：2012-09-11

申请号：US13300141

申请日：2011-11-18

申请人： Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C7/00

CPC分类号： G11C7/1048 ,  G11C16/28

摘要： Over-erasure induced noise on a data line in a nonvolatile memory that couples into an adjacent data line is mitigated by using twisted data lines and differential sensing amplifiers. Noise coupled into data lines is compensated by similar noise coupled into reference data lines and cancelled in the differential sensing amplifiers.

摘要翻译： 通过使用扭曲的数据线和差分感测放大器来减轻耦合到相邻数据线的非易失性存储器中的数据线上的过度擦除感应噪声。 耦合到数据线中的噪声由耦合到参考数据线中的相似噪声补偿并在差分感测放大器中被消除。

公开(公告)号：US08174289B2

公开(公告)日：2012-05-08

申请号：US12854616

申请日：2010-08-11

申请人： Yung-Feng Lin ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Chun-Hsiung Hung

IPC分类号： H03K19/0175

CPC分类号： H03K3/356113 ,  H03K3/356182

摘要： A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for receiving the input voltage and outputting a first voltage. The second switch device is coupled to the first switch device for outputting a first operational voltage as the output voltage according to the first voltage. The first control switch is coupled to the first switch device for receiving the first voltage. The third switch device is coupled between the first control switch and the first operational voltage and controlled by the output voltage. The second level-switching device is coupled to the first level-switching device for receiving the input voltage and accordingly outputting a second operational voltage as the output voltage.

摘要翻译： 电平移位器包括第一电平转换装置和第二电平转换装置。 第一电平切换装置包括第一开关装置，第二开关装置，第一控制开关和第三开关装置。 第一开关装置用于接收输入电压并输出第一电压。 第二开关装置耦合到第一开关装置，用于根据第一电压输出第一工作电压作为输出电压。 第一控制开关耦合到第一开关装置以接收第一电压。 第三开关装置耦合在第一控制开关和第一工作电压之间并由输出电压控制。 第二电平切换装置耦合到第一电平切换装置，用于接收输入电压，并因此输出第二工作电压作为输出电压。

公开(公告)号：US07791372B2

公开(公告)日：2010-09-07

申请号：US12171542

申请日：2008-07-11

申请人： Yung-Feng Lin ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Chun-Hsiung Hung

IPC分类号： H03K19/0175

CPC分类号： H03K3/356113 ,  H03K3/356182

摘要： A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for receiving the input voltage and outputting a first voltage. The second switch device is coupled to the first switch device for outputting a first operational voltage as the output voltage according to the first voltage. The first control switch is coupled to the first switch device for receiving the first voltage. The third switch device is coupled between the first control switch and the first operational voltage and controlled by the output voltage. The second level-switching device is coupled to the first level-switching device for receiving the input voltage and accordingly outputting a second operational voltage as the output voltage.

摘要翻译： 电平移位器包括第一电平转换装置和第二电平转换装置。 第一电平切换装置包括第一开关装置，第二开关装置，第一控制开关和第三开关装置。 第一开关装置用于接收输入电压并输出第一电压。 第二开关装置耦合到第一开关装置，用于根据第一电压输出第一工作电压作为输出电压。 第一控制开关耦合到第一开关装置以接收第一电压。 第三开关装置耦合在第一控制开关和第一工作电压之间并由输出电压控制。 第二电平切换装置耦合到第一电平切换装置，用于接收输入电压，并因此输出第二工作电压作为输出电压。

公开(公告)号：US20100301918A1

公开(公告)日：2010-12-02

申请号：US12854616

申请日：2010-08-11

申请人： Yung-Feng Lin ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Chun-Hsiung Hung

IPC分类号： H03L5/00

CPC分类号： H03K3/356113 ,  H03K3/356182

摘要： A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for receiving the input voltage and outputting a first voltage. The second switch device is coupled to the first switch device for outputting a first operational voltage as the output voltage according to the first voltage. The first control switch is coupled to the first switch device for receiving the first voltage. The third switch device is coupled between the first control switch and the first operational voltage and controlled by the output voltage. The second level-switching device is coupled to the first level-switching device for receiving the input voltage and accordingly outputting a second operational voltage as the output voltage.

摘要翻译： 电平移位器包括第一电平转换装置和第二电平转换装置。 第一电平切换装置包括第一开关装置，第二开关装置，第一控制开关和第三开关装置。 第一开关装置用于接收输入电压并输出第一电压。 第二开关装置耦合到第一开关装置，用于根据第一电压输出第一工作电压作为输出电压。 第一控制开关耦合到第一开关装置以接收第一电压。 第三开关装置耦合在第一控制开关和第一工作电压之间并由输出电压控制。 第二电平切换装置耦合到第一电平切换装置，用于接收输入电压，并因此输出第二工作电压作为输出电压。

公开(公告)号：US06618848B2

公开(公告)日：2003-09-09

申请号：US09814409

申请日：2001-03-22

申请人： Han-Sung Chen ,  Kuo-Yu Liao ,  Yung-Feng Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

发明人： Han-Sung Chen ,  Kuo-Yu Liao ,  Yung-Feng Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

IPC分类号： G06F1750

CPC分类号： G11C7/18 ,  G11C17/12

摘要： A method for designing a circuit layout of non-neighboring metal bit lines to reduce coupling effect in sensing operation is disclosed. The method comprises providing a memory array having a plurality of bit lines arranged sequentially, wherein every two adjacent bit lines are paired in the sensing operation of a memory cell in the memory array. The first embodiment is presented by assigning a first pair of the bit lines permuted with each other to create a non-neighboring bit line layout. The second embodiment is presented by inserting one of a second pair of the bit lines into a first pair of bit lines to separate the first pair of bit lines in layout design. The method further comprises shrinking the layout space between two adjacent non-paired bit lines. In this way, the method contributes to the reduction of metal bit line coupling effect without any trade off of integrated circuit density by modifying the circuit layout of metal bit lines to a non-neighboring bit line arrangement in a memory array.

摘要翻译： 公开了一种用于设计不相邻金属位线的电路布局以减少感测操作中的耦合效应的方法。 该方法包括提供具有顺序布置的多个位线的存储器阵列，其中每两个相邻位线在存储器阵列中的存储器单元的感测操作中配对。 通过分配互相排列的第一对位线来创建第一实施例以产生非相邻位线布局。 通过将第二对位线中的一个插入到第一对位线中以在布局设计中分离第一对位线来呈现第二实施例。 该方法还包括收缩两个相邻非配对位线之间的布局空间。 以这种方式，通过将金属位线的电路布局修改为存储器阵列中的非相邻位线布置，该方法有助于减少金属位线耦合效应，而不会降低集成电路密度。

公开(公告)号：US07599220B2

公开(公告)日：2009-10-06

申请号：US11802785

申请日：2007-05-25

申请人： Yung-Feng Lin ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Chun-Hsiung Hung

IPC分类号： G11C16/06

CPC分类号： G11C16/26

摘要： An accessing method for a charge trapping memory including memory cells and tracking cells for storing expected data. The method includes the following steps. In a specific time first, the expected data is written into the tracking cells and the memory cells are not being programmed, read or erased. Next, the data stored in the tracking cells is sensed as read data according to a present reference current. Then, the present reference current is adjusted to an adjusted reference current according to a difference between the read data and the expected data so that the data stored in tracking cells is sensed as corresponding with the expected data according to the adjusted reference current. Thereafter, the memory cells are read according to the adjusted reference current.

摘要翻译： 一种用于包含存储单元和用于存储预期数据的跟踪单元的电荷俘获存储器的访问方法。 该方法包括以下步骤。 首先，在特定时间内，预期数据被写入跟踪单元，并且存储单元未被编程，读取或擦除。 接下来，根据本参考电流将存储在跟踪单元中的数据感测为读取数据。 然后，根据读取的数据和预期数据之间的差异，将本参考电流调节到调整的参考电流，使得根据调整的参考电流将存储在跟踪单元中的数据感测为与预期数据相对应。 此后，根据调整的参考电流来读取存储器单元。

公开(公告)号：US20080291722A1

公开(公告)日：2008-11-27

申请号：US11802785

申请日：2007-05-25

申请人： Yung-Feng Lin ,  Chun-Hsiung Hung

发明人： Yung-Feng Lin ,  Chun-Hsiung Hung

IPC分类号： G11C11/34

CPC分类号： G11C16/26

摘要： An accessing method for a charge trapping memory including memory cells and tracking cells for storing expected data. The method includes the following steps. In a specific time first, the expected data is written into the tracking cells and the memory cells are not being programmed, read or erased. Next, the data stored in the tracking cells is sensed as read data according to a present reference current. Then, the present reference current is adjusted to an adjusted reference current according to a difference between the read data and the expected data so that the data stored in tracking cells is sensed as corresponding with the expected data according to the adjusted reference current. Thereafter, the memory cells are read according to the adjusted reference current.

摘要翻译： 一种用于包含存储单元和用于存储预期数据的跟踪单元的电荷俘获存储器的访问方法。 该方法包括以下步骤。 首先，在特定时间内，预期数据被写入跟踪单元，并且存储单元未被编程，读取或擦除。 接下来，根据本参考电流将存储在跟踪单元中的数据感测为读取数据。 然后，根据读取的数据和预期数据之间的差异，将本参考电流调节到调整的参考电流，使得根据调整的参考电流将存储在跟踪单元中的数据感测为与预期数据相对应。 此后，根据调整的参考电流来读取存储器单元。

公开(公告)号：US08040734B2

公开(公告)日：2011-10-18

申请号：US12767418

申请日：2010-04-26

申请人： Yung-Feng Lin ,  Chun-Yi Lee

发明人： Yung-Feng Lin ,  Chun-Yi Lee

IPC分类号： G11C11/34

CPC分类号： G11C7/062 ,  G11C7/067 ,  G11C7/08 ,  G11C16/28 ,  G11C2207/063

摘要： A sense amplifying method, applied in a memory having a memory cell and a reference cell, includes: charging the memory cell and the reference cell to have a cell current and a reference current, respectively; duplicating the cell current and the reference current to respectively generate a mirrored cell current via a first current path and a mirrored reference current via a second current path and equalizing a first voltage drop generated as the mirrored cell current flows by the first current path and a second voltage drop generated as the mirrored reference current flows by the second current path; and removing the equalization of the first voltage drop and the second voltage drop and adjusting first voltage drop and the second voltage drop according to a first current flowing by the first current path and a second current flowing by the second current path.

摘要翻译： 应用于具有存储单元和参考单元的存储器中的感测放大方法包括：分别对存储单元和参考单元充电以具有单元电流和参考电流; 复制单元电流和参考电流以经由第二电流路径分别经由第一电流路径和镜像参考电流产生镜像单元电流，并且均衡由第一电流路径流动的镜像单元电流产生的第一电压降和 当第二电流路径流过镜像参考电流时产生的第二电压降; 以及去除所述第一电压降和所述第二电压降的均衡，并且根据由所述第一电流路径流动的第一电流和由所述第二电流路径流动的第二电流来调节第一电压降和所述第二电压降。