公开(公告)号：US07400018B2

公开(公告)日：2008-07-15

申请号：US11462846

申请日：2006-08-07

申请人： Chung Foong Tan ,  Jinping Liu ,  Hyeok Jae Lee ,  Bangun Indajang ,  Eng Fong Chor ,  Shiang Yang Ong

发明人： Chung Foong Tan ,  Jinping Liu ,  Hyeok Jae Lee ,  Bangun Indajang ,  Eng Fong Chor ,  Shiang Yang Ong

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： H01L29/1054 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/74 ,  H01L29/6659

摘要： A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer is grown overlying the carbon-doped silicon layer to provide a starting wafer for the integrated circuit device fabrication. An integrated circuit device is fabricated on the starting wafer by the following steps. A gate electrode is formed on the starting wafer. LDD and source and drain regions are implanted in the starting wafer adjacent to the gate electrode. Indium is implanted to form halo implants adjacent to the LDD regions and underlying the gate electrode wherein the halo implants extend to an interface between the epitaxial silicon layer and the carbon-doped silicon layer wherein carbon ions in the carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by the halo implants to prevent end of range secondary defect formation.

摘要翻译： 实现了在光栅掺杂分布的间隙a-c硅界面处将碳结合到晶片中的方法。 提供体硅衬底。 在体硅衬底上沉积碳掺杂硅层。 生长外延硅层覆盖碳掺杂硅层以提供集成电路器件制造的起始晶片。 通过以下步骤在起始晶片上制造集成电路器件。 在起始晶片上形成栅电极。 将LDD和源极和漏极区域注入到与栅电极相邻的起始晶片中。 植入铟以形成与LDD区域相邻并且位于栅电极下方的卤素植入物，其中所述卤素注入延伸到外延硅层和碳掺杂硅层之间的界面，其中碳掺杂硅层中的碳离子用作 用于由光晕植入物形成的硅间隙的硅间隙槽，以防止范围二次缺陷形成的结束。

公开(公告)号：US07109099B2

公开(公告)日：2006-09-19

申请号：US10688047

申请日：2003-10-17

申请人： Chung Foong Tan ,  Jinping Liu ,  Hyeok Jae Lee ,  Bangun Indajang ,  Eng Fong Chor ,  Shiang Yang Ong

发明人： Chung Foong Tan ,  Jinping Liu ,  Hyeok Jae Lee ,  Bangun Indajang ,  Eng Fong Chor ,  Shiang Yang Ong

IPC分类号： H01L21/425 ,  H01L21/36 ,  H01L21/20 ,  H01L21/265

CPC分类号： H01L29/1054 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/74 ,  H01L29/6659

摘要： A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer is grown overlying the carbon-doped silicon layer to provide a starting wafer for the integrated circuit device fabrication. An integrated circuit device is fabricated on the starting wafer by the following steps. A gate electrode is formed on the starting wafer. LDD and source and drain regions are implanted in the starting wafer adjacent to the gate electrode. Indium is implanted to form halo implants adjacent to the LDD regions and underlying the gate electrode wherein the halo implants extend to an interface between the epitaxial silicon layer and the carbon-doped silicon layer wherein carbon ions in the carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by the halo implants to prevent end of range secondary defect formation.

摘要翻译： 实现了在光栅掺杂分布的间隙a-c硅界面处将碳结合到晶片中的方法。 提供体硅衬底。 在体硅衬底上沉积碳掺杂硅层。 生长外延硅层覆盖碳掺杂硅层以提供集成电路器件制造的起始晶片。 通过以下步骤在起始晶片上制造集成电路器件。 在起始晶片上形成栅电极。 将LDD和源极和漏极区域注入到与栅电极相邻的起始晶片中。 植入铟以形成与LDD区域相邻并且位于栅电极下方的卤素植入物，其中所述卤素注入延伸到外延硅层和碳掺杂硅层之间的界面，其中碳掺杂硅层中的碳离子用作 用于由光晕植入物形成的硅间隙的硅间隙槽，以防止范围二次缺陷形成的结束。

公开(公告)号：US5923068A

公开(公告)日：1999-07-13

申请号：US931882

申请日：1997-09-17

申请人： Hyeok Jae Lee ,  Yun Jong Huh

发明人： Hyeok Jae Lee ,  Yun Jong Huh

IPC分类号： H01L29/73 ,  H01L21/30 ,  H01L21/331 ,  H01L27/02 ,  H01L27/06 ,  H01L29/732 ,  H01L23/62

CPC分类号： H01L27/0251 ,  H01L2924/0002

摘要： Electrostatic discharge protection device is provided that protects the gate insulating layer without using an additional circuit to lower the trigger voltage of a thyristor. The electrostatic discharge protection device includes first and second impurity regions of a bipolar transistor being spaced a predetermined distance apart in a first conductivity type semiconductor substrate, and first and second impurity regions of a field transistor perpendicular to and along both sides of the first and second impurity regions of the bipolar transistor. A gate line formed between the first and second impurity regions of the bipolar transistor on the semiconductor substrate is coupled to one of the impurity regions of the field transistor. A Vss line is coupled to the other impurity region of the field transistor. The Vss line is also coupled to the first impurity region of the bipolar transistor. A metal layer is coupled to the first impurity region of the bipolar transistor and a pad.

摘要翻译： 提供了静电放电保护装置，其保护栅极绝缘层而不使用附加电路来降低晶闸管的触发电压。 静电放电保护装置包括在第一导电类型半导体衬底中间隔开预定距离的双极晶体管的第一和第二杂质区，以及垂直于第一和第二半导体衬底的两侧的场晶体管的第一和第二杂质区 双极晶体管的杂质区域。 形成在半导体衬底上的双极晶体管的第一和第二杂质区之间的栅极线耦合到场晶体管的一个杂质区。 Vss线耦合到场晶体管的另一个杂质区域。 Vss线还耦合到双极晶体管的第一杂质区。 金属层耦合到双极晶体管的第一杂质区域和焊盘。

公开(公告)号：US06303441B1

公开(公告)日：2001-10-16

申请号：US09306915

申请日：1999-05-07

申请人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

发明人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

IPC分类号： H01L21336

CPC分类号： H01L29/66613 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/78621 ,  H01L29/78696

摘要： A semiconductor device and a method for fabricating the same is disclosed, which minimizes device degradation, minimizes noises, and simplifies the fabrication process. The device includes a substrate having a first semiconductor layer, a buried insulating film, and a second semiconductor layer stacked; a field oxide film for separating the second semiconductor layer into a first region and a second region; a recess region formed in a particular region of the second region; gate insulating films and gate electrodes formed in stacks on each of a particular region in the first region and the recess region in the second region; first impurity regions formed in surfaces of the second semiconductor layer on both sides of the gate electrode in the first region; and second impurity regions formed in surfaces of the second semiconductor layer on both sides of the gate electrode in the recess region in the second region so that the second semiconductor layer below the gate electrode is fully depleted.

摘要翻译： 公开了一种半导体器件及其制造方法，其使器件劣化最小化，使噪声最小化并简化制造工艺。 该器件包括具有第一半导体层，埋入绝缘膜和堆叠的第二半导体层的衬底; 用于将第二半导体层分离成第一区域和第二区域的场氧化物膜; 形成在所述第二区域的特定区域中的凹部区域; 在第一区域中的特定区域和第二区域中的凹陷区域中的每一个上堆叠形成栅极绝缘膜和栅电极; 在所述第一区域中的所述栅电极的两侧上形成在所述第二半导体层的表面中的第一杂质区; 以及在所述第二区域中的所述凹部区域中的所述栅电极的两侧上形成在所述第二半导体层的表面中的第二杂质区域，使得所述栅电极下方的所述第二半导体层完全耗尽。

公开(公告)号：US06573576B2

公开(公告)日：2003-06-03

申请号：US09944151

申请日：2001-09-04

申请人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

发明人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

IPC分类号： H01L2976

CPC分类号： H01L29/66613 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/78621 ,  H01L29/78696

摘要： A semiconductor device and a method for fabricating the same is disclosed, which minimizes device degradation, minimizes noises, and simplifies the fabrication process. The device includes a substrate having a first semiconductor layer, a buried insulating film, and a second semiconductor layer stacked; a field oxide film for separating the second semiconductor layer into a first region and a second region; a recess region formed in a particular region of the second region; gate insulating films and gate electrodes formed in stacks on each of a particular region in the first region and the recess region in the second region; first impurity regions formed in surfaces of the second semiconductor layer on both sides of the gate electrode in the first region; and second impurity regions formed in surfaces of the second semiconductor layer on both sides of the gate electrode in the recess region in the second region so that the second semiconductor layer below the gate electrode is fully depleted.

公开(公告)号：US06509210B2

公开(公告)日：2003-01-21

申请号：US09736205

申请日：2000-12-15

申请人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

发明人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

IPC分类号： H01L2100

CPC分类号： H01L29/66757 ,  H01L21/764

摘要： A semiconductor device and method of fabricating the same. The semiconductor device includes a first insulating film formed on a substrate and having a plurality of holes therein; a cavity formed under the first insulating film; an impurity region formed in the substrate and around the cavity; a second insulating film formed on portions of the first insulating film to fill the holes and a space between the cavity and the impurity region; a plurality of contact holes formed to expose certain portions of the impurity region; and a plurality of wiring layers formed to be in contact with the impurity region through the contact holes.

摘要翻译： 一种半导体器件及其制造方法。 半导体器件包括形成在衬底上并在其中具有多个孔的第一绝缘膜; 形成在所述第一绝缘膜下面的空腔; 形成在所述基板中并且围绕所述空腔的杂质区域; 形成在第一绝缘膜的部分上以填充孔的第二绝缘膜和空腔与杂质区之间的空间; 形成为暴露所述杂质区域的某些部分的多个接触孔; 以及形成为通过接触孔与杂质区域接触的多个布线层。

公开(公告)号：US06191467B1

公开(公告)日：2001-02-20

申请号：US09307033

申请日：1999-05-07

申请人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

发明人： Young June Park ,  Jong Ho Lee ,  Hyeok Jae Lee

IPC分类号： H01L2978

CPC分类号： H01L29/66757 ,  H01L21/764

摘要： A semiconductor device and method of fabricating the same. The semiconductor device includes a first insulating film formed on a substrate and having a plurality of holes therein; a cavity formed under the first insulating film; an impurity region formed in the substrate and around the cavity; a second insulating film formed on portions of the first insulating film to fill the holes and a space between the cavity and the impurity region; a plurality of contact holes formed to expose certain portions of the impurity region; and a plurality of wiring layers formed to be in contact with the impurity region through the contact holes.

摘要翻译： 一种半导体器件及其制造方法。 半导体器件包括形成在衬底上并在其中具有多个孔的第一绝缘膜; 形成在所述第一绝缘膜下面的空腔; 形成在所述基板中并且围绕所述空腔的杂质区域; 形成在第一绝缘膜的部分上以填充孔的第二绝缘膜和空腔和杂质区之间的空间; 形成为暴露所述杂质区域的某些部分的多个接触孔; 以及形成为通过接触孔与杂质区域接触的多个布线层。